# US 10,311,820 B2 · Over current protection circuit and liquid crystal display > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,311,820 B2 - Document ID: US10311820B2 - Status: Granted - Kind: B2 - Application number: 15/743,681 - Filed: 2017-09-30 - Published: 2019-03-14 - Granted: 2019-06-04 - Earliest claimed: 2017-09-13 - Assignees: Shenzhen China Star Optoelectronics Technology Co., Ltd. - Applicants: Shenzhen China Star Optoelectronics Technology Co., Ltd. - Inventors: Xianming Zhang - Web page: https://patentgrep.com/patent/US10311820B2 ## CPC - G09G 3/3677: {suitable for active matrices only} - G09G 3/20: for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix {no fixed position being assigned to or needed to be assigned to the individual characters or partial characters} - G09G 3/36: using liquid crystals - H02H 1/0007: {concerning the detecting means (in general G01R or other subclasses of G01; reed switches H01H71/2445)} - H02H 7/20: for electronic equipment (for converters H02H7/10; for electric measuring instruments G01R1/36; for DC voltage or current semiconductor regulators G05F1/569; for amplifiers H03F1/52; for electronic switching circuits H03K17/08) - H02M 1/32: Means for protecting converters other than automatic disconnection - G09G 2300/0871: with level shifting - G09G 2310/0291: Details of output amplifiers or buffers arranged for use in a driving circuit - G09G 2330/04: Display protection - G09G 2330/08: Fault-tolerant or redundant circuits, or circuits in which repair of defects is prepared - H02M 1/325: {with means for allowing continuous operation despite a fault, i.e. fault tolerant converters} - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) - H02H: EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS (indicating or signalling undesired working conditions G01R, e.g. G01R31/00, G08B; locating faults along lines G01R31/08; emergency protective devices H01H) - H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P) ## Abstract Disclosed is an over current protection circuit, comprising N left over current protection sub circuit and N right over current protection sub circuit, applied in the GOA circuit having a dual driving function, each of the left GOA units and right GOA units can be driven by the clock control signals outputted respectively by the corresponding left and right level shifting sub circuits; the first left level shifting sub circuit and the first left GOA unit are coupled through the first left clock line, the first left over current protection sub circuit, which is coupled to the first left clock line in series or arranged between the first left clock line and the first left level shifting sub circuit controls the first left level shifting sub circuit to stop outputting the first left clock control signal when the first left driving current is larger than a predetermined current threshold value. ## Claims ### Claim 1 An over current protection circuit, applied in a substrate array row driving gate driver on array (GOA) circuit having a dual driving function, wherein the GOA circuit having the dual driving function comprises N left GOA units, N right GOA units, a left level shifting circuit and a right level shifting circuit, wherein the over current protection circuit comprises a left over current protection circuit and a right over current protection circuit, the left over current protection circuit comprises N left over current protection sub circuits and the right over current protection circuit comprises N right over current protection sub circuits, the left level shifting circuit comprises N left level shifting sub circuits and the right level shifting circuit comprises N right level shifting sub circuits, each of the left GOA units is driven by a corresponding left level shifting sub circuit and each of the right GOA units is driven by a corresponding right level shifting sub circuit, N is an positive integer; a first left GOA unit and a first left level shifting sub circuit are coupled through a first left clock line, a first left over current protection sub circuit is coupled to the first left clock line and the first left level shifting sub circuit; a first right GOA unit and a first right level shifting sub circuit are coupled through a first right clock line, a first right over current protection sub circuit is coupled to the first right clock line and the first right level shifting sub circuit; the first left GOA unit is any one of the N left GOA units and the first right GOA unit is any one of the N right GOA units; when the first left level shifting circuit works, the first left level shifting circuit generates a first left clock control signal to be outputted to the first left GOA unit through the first left clock line; when the first right level shifting circuit works, the first right level shifting circuit generates a first right clock control signal to be outputted to the first right GOA unit through the first right clock line; the first left clock control signal has the same timing as the first right clock control signal; the first left over current protection sub circuit detects a first left driving current on the first left clock line and controls the first left level shifting sub circuit to stop working when the first left driving current is larger than a predetermined current threshold value; the first right over current protection sub circuit detects a first right driving current on the first right clock line and controls the first right level shifting sub circuit to stop working when the first right driving current is larger than the predetermined current threshold value. ### Claim 2 (depends on 1) The over current protection circuit according to claim 1, wherein the first left over current protection sub circuit outputs a first left stopping control signal to the first left level shifting sub circuit when first left driving current is larger than the predetermined current threshold value to control the first left level shifting sub circuit to stop working. ### Claim 3 (depends on 2) The over current protection circuit according to claim 2, wherein the first left level shifting sub circuit comprises a first left controlling circuit and a first left amplifying circuit, when the first left level shifting sub circuit works, the first left amplifying circuit converts a clock signal inputted to the first left controlling circuit by a clock controller into the first left clock control signal; the first left controlling circuit controls the first left amplifying circuit to stop working when the first left controlling circuit receives the first left stopping control signal. ### Claim 4 (depends on 1) The over current protection circuit according to claim 1, wherein the first right over current protection sub circuit outputs a first right stopping control signal to the first right level shifting sub circuit when first right driving current is larger than the predetermined current threshold value to control the first right level shifting sub circuit to stop working. ### Claim 5 (depends on 4) The over current protection circuit according to claim 4, wherein the first right level shifting sub circuit comprises a first right controlling circuit and a first right amplifying circuit, when the first right level shifting sub circuit works, the first right amplifying circuit converts a clock signal inputted to the first right controlling circuit by a clock controller into the first right clock control signal; the first right controlling circuit controls the first right amplifying circuit to stop working when the first right controlling circuit receives the first right stopping control signal. ### Claim 6 An over current protection circuit, applied in a substrate array row driving gate driver on array (GOA) circuit having a dual driving function, wherein the GOA circuit having the dual driving function comprises N left GOA units, N right GOA units, a left level shifting circuit and a right level shifting circuit, wherein the over current protection circuit comprises a left over current protection circuit and a right over current protection circuit, the left over current protection circuit comprises N left over current protection sub circuits and the right over current protection circuit comprises N right over current protection sub circuits, both the left over current protection sub circuits and the right over current protection sub circuits are fuses, the left level shifting circuit comprises N left level shifting sub circuits and the right level shifting circuit comprises N right level shifting sub circuits, each of the left GOA units is driven by a corresponding left level shifting sub circuit and each of the right GOA units is driven by a corresponding right level shifting sub circuit, N is an positive integer; a first left GOA unit and a first left level shifting sub circuit are coupled through a first left clock line, a first left over current protection sub circuit is coupled to the first left clock line in series; a first right GOA unit and a first right level shifting sub circuit are coupled through a first right clock line, a first right over current protection sub circuit is coupled to the first right clock line in series; the first left GOA unit is any one of the N left GOA units and the first right GOA unit is any one of the N right GOA units; when the first left level shifting circuit works, the first left level shifting circuit generates a first left clock control signal to be outputted to the first left GOA unit through the first left clock line; when the first right level shifting circuit works, the first right level shifting circuit generates a first right clock control signal to be outputted to the first right GOA unit through the first right clock line; the first left clock control signal has the same timing as the first right clock control signal; the first left over current protection sub circuit is fused when the first left clock control signal on the first left clock line is larger than a predetermined current threshold value to stop the first left level shifting sub circuit outputting the first left clock control signal to the first left GOA unit; the first right over current protection sub circuit is fused when the first right clock control signal on the first right clock line is larger than the predetermined current threshold value to stop the first right level shifting sub circuit outputting the first right clock control signal to the first right GOA unit. ### Claim 7 (depends on 6) The over current protection circuit according to claim 6, wherein both the first left over current protection sub circuit and the first right over current protection sub circuit are recoverable fuses. ### Claim 8 (depends on 6) The over current protection circuit according to claim 6, wherein the first left level shifting sub circuit comprises a first left controlling circuit and a first left amplifying circuit, when the first left level shifting sub circuit works, the first left amplifying circuit converts a clock signal inputted to the first left controlling circuit by a clock controller into the first left clock control signal; the first left controlling circuit controls the first left amplifying circuit to stop working when the first left over current protection sub circuit is fused. ### Claim 9 (depends on 6) The over current protection circuit according to claim 6, wherein the first right level shifting sub circuit comprises a first right controlling circuit and a first right amplifying circuit, when the first right level shifting sub circuit works, the first right amplifying circuit converts a clock signal inputted to the first right controlling circuit by a clock controller into the first right clock control signal; the first right controlling circuit controls the first right amplifying circuit to stop working when the first right over current protection circuit is fused. ### Claim 10 A liquid crystal display, comprising a substrate array row driving gate driver on array (GOA) circuit having a dual driving function and an over current protection circuit, wherein the GOA circuit having the dual driving function comprises N left GOA units, N right GOA units, a left level shifting circuit and a right level shifting circuit, wherein the over current protection circuit comprises a left over current protection circuit and a right over current protection circuit, the left over current protection circuit comprises N left over current protection sub circuits and the right over current protection circuit comprises N right over current protection sub circuits, both the left over current protection sub circuits and the right over current protection sub circuits are fuses, the left level shifting circuit comprises N left level shifting sub circuits and the right level shifting circuit comprises N right level shifting sub circuits, each of the left GOA units is driven by a corresponding left level shifting sub circuit and each of the right GOA units is driven by a corresponding right level shifting sub circuit, N is an positive integer; a first left GOA unit and a first left level shifting sub circuit are coupled through a first left clock line, a first left over current protection sub circuit is coupled to the first left clock line in series; a first right GOA unit and a first right level shifting sub circuit are coupled through a first right clock line, a first right over current protection sub circuit is coupled to the first right clock line in series; the first left GOA unit is any one of the N left GOA units and the first right GOA unit is any one of the N right GOA units; when the first left level shifting circuit works, the first left level shifting circuit generates a first left clock control signal to be outputted to the first left GOA unit through the first left clock line; when the first right level shifting circuit works, the first right level shifting circuit generates a first right clock control signal to be outputted to the first right GOA unit through the first right clock line; the first left clock control signal has the same timing as the first right clock control signal; the first left over current protection sub circuit is fused when the first left clock control signal on the first left clock line is larger than a predetermined current threshold value to stop the first left level shifting sub circuit outputting the first left clock control signal to the first left GOA unit; the first right over current protection sub circuit is fused when the first right clock control signal on the first right clock line is larger than the predetermined current threshold value to stop the first right level shifting sub circuit outputting the first right clock control signal to the first right GOA unit. ### Claim 11 (depends on 10) The liquid crystal display according to claim 10, wherein both the first left over current protection sub circuit and the first right over current protection sub circuit are recoverable fuses. ### Claim 12 (depends on 10) The liquid crystal display according to claim 10, wherein the first left level shifting sub circuit comprises a first left controlling circuit and a first left amplifying circuit, when the first left level shifting sub circuit works, the first left amplifying circuit converts a clock signal inputted to the first left controlling circuit by a clock controller into the first left clock control signal; the first left controlling circuit controls the first left amplifying circuit to stop working when the first left over current protection sub circuit is fused. ### Claim 13 (depends on 10) The liquid crystal display according to claim 10, wherein the first right level shifting sub circuit comprises a first right controlling circuit and a first right amplifying circuit, when the first right level shifting sub circuit works, the first right amplifying circuit converts a clock signal inputted to the first right controlling circuit by a clock controller into the first right clock control signal; the first right controlling circuit controls the first right amplifying circuit to stop working when the first right over current protection circuit is fused.