# US 10,311,790 B2 · Pixel circuits for amoled displays > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,311,790 B2 - Document ID: US10311790B2 - Status: Granted - Kind: B2 - Application number: 15/979,848 - Filed: 2018-05-15 - Published: 2018-09-13 - Granted: 2019-06-04 - Earliest claimed: 2012-12-11 - Assignees: Ignis Innovation Inc. - Applicants: Ignis Innovation Inc. - Inventors: Gholamreza Chaji - Web page: https://patentgrep.com/patent/US10311790B2 ## CPC - G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element - G09G 3/3266: Details of drivers for scan electrodes - G09G 3/3291: in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements - G09G 2300/0819: used for counteracting undesired variations, e.g. feedback or autozeroing - G09G 2300/0842: forming a memory circuit, e.g. a dynamic memory with one capacitor - G09G 2300/0861: with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes - G09G 2320/0295: by monitoring each display pixel - G09G 2320/043: Preventing or counteracting the effects of ageing - G09G 2320/045: Compensation of drifts in the characteristics of light emitting or modulating elements - G09G 2320/0693: Calibration of display systems - G09G 2320/10: Special adaptations of display systems for operation with variable images - G09G 2330/08: Fault-tolerant or redundant circuits, or circuits in which repair of defects is prepared - G09G 2330/10: Dealing with defective pixels - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) ## Abstract A system for controlling a display in which each pixel circuit comprises a light-emitting device, a drive transistor, a storage capacitor, a reference voltage source, and a programming voltage source. The storage capacitor stores a voltage equal to the difference between the reference voltage and the programming voltage, and a controller supplies a programming voltage that is a calibrated voltage for a known target current, reads the actual current passing through the drive transistor to a monitor line, turns off the light emitting device while modifying the calibrated voltage to make the current supplied through the drive transistor substantially the same as the target current, modifies the calibrated voltage to make the current supplied through the drive transistor substantially the same as the target current, and determines a current corresponding to the modified calibrated voltage based on predetermined current-voltage characteristics of the drive transistor. ## Claims ### Claim 1 A system for controlling a display, the system comprising: a reference voltage source; a programming voltage source; a pixel circuit including a light-emitting device, a drive transistor for driving current through the light-emitting device according to a driving voltage across the drive transistor during an emission cycle, a storage capacitor coupled to a gate of said drive transistor for storing said driving voltage, a first switching transistor that controls a coupling of said reference voltage source to said storage capacitor, a second switching transistor that controls a coupling of said programming voltage source to the gate of said drive transistor, the second switching transistor controlled by a signal used to control the first switching transistor of the pixel circuit in an adjacent row of the display, and a controller configured to allow a node between the drive transistor and the light-emitting device to charge to a voltage that is a function of the characteristics of the drive transistor, and charge a node between said storage capacitor and the gate of said drive transistor to said programming voltage. ### Claim 2 (depends on 1) The system according to claim 1 further comprising a monitor line coupled to the node through a read transistor. ### Claim 3 (depends on 2) The system according to claim 2 wherein the controller is further configured to charge a node between said storage capacitor and the gate of said drive transistor with said programming voltage including enabling the second switch transistor after disabling the read transistor and the first switch transistor. ### Claim 4 (depends on 2) The system according to claim 2 wherein the controller is further configured to read from the monitor line a voltage of said light-emitting device. ### Claim 5 (depends on 2) The system according to claim 2 wherein the controller is further configured to, during an operation cycle prior to a compensation interval, enable the read transistor before enabling the first switching transistor for resetting the node between the drive transistor and the light-emitting device. ### Claim 6 (depends on 5) The system according to claim 5 wherein the controller is further configured to, during the operation cycle prior to the compensation interval, disable the first switching transistor and disable the read transistor at different times. ### Claim 7 (depends on 5) The system according to claim 5 wherein the controller is further configured to, during the operation cycle prior to the compensation interval, enable the first switching transistor before disabling the read transistor. ### Claim 8 (depends on 2) The system according to claim 2 wherein the controller is further configured to control the first switching transistor and the read transistor with a common signal. ### Claim 9 (depends on 2) The system according to claim 2 wherein the controller's being configured to allow said node to charge to a voltage that is a function of the characteristics of the drive transistor comprises the controller being configured to disable the read transistor and disable the first switch transistor.