# US 10,311,772 B2 · Signal supply circuit and display device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,311,772 B2 - Document ID: US10311772B2 - Status: Granted - Kind: B2 - Application number: 15/405,616 - Filed: 2017-01-13 - Published: 2017-07-13 - Granted: 2019-06-04 - Earliest claimed: 2016-01-13 - Assignees: Japan Display Inc. - Applicants: Japan Display Inc. - Inventors: Takayuki Nakao; Takehiro Shima - Web page: https://patentgrep.com/patent/US10311772B2 ## CPC - G09G 3/2074: {using sub-pixels} - G09G 3/2003: {Display of colours (specific for liquid crystal displays G09G3/3607)} - G09G 3/2092: {Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto (suitable for both CRT and flat panel G09G5/003; specific for a CRT G09G1/165)} - G09G 3/3648: {using an active matrix (G09G3/367 - G09G3/3696 take precedence)} - G09G 3/3688: {suitable for active matrices only} - G09G 3/3614: {Control of polarity reversal in general} - G09G 2300/0439: Pixel structures - G09G 2300/0452: Details of colour pixel setup, e.g. pixel composed of a red, a blue and two green components - G09G 2300/0857: Static memory circuit, e.g. flip-flop - G09G 2320/0666: for control of colour parameters, e.g. colour temperature - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) ## Abstract According to an embodiment, in a display device, pixels have memories respectively. A signal supply circuit includes a mode control circuit, and switches into a first mode or a second mode to supply digital data pieces to sub-pixels. In the first mode, the circuit receives from the outside first video data pieces corresponding to n sub-pixels, and supplies digital data pieces for the n sub-pixels to corresponding memories. In the second mode, the signal supply circuit receives from the outside second video data pieces corresponding to m sub-pixels fewer than n sub-pixels, and supplies digital data pieces for the n sub-pixels to corresponding memories based on the second video data pieces. ## Claims ### Claim 1 A signal supply circuit which is used in a display device where pixels have memories respectively, comprising: a mode control circuit which controls an operation mode, wherein the mode control circuit selectively changes the signal supply circuit between a first mode and a second mode in order to supply digital data pieces for sub-pixels to the respective memories, the first mode is a mode to receive first video data pieces for n sub-pixels externally received, and to supply n digital data pieces for the n sub-pixels to the respective memories of the n sub-pixels based on the first video data pieces, and the second mode is a mode to receive second video data pieces for m sub-pixels fewer than the n sub-pixels externally received, and to supply n digital data pieces for the n sub-pixels to the respective memories of the n sub-pixels based on the second video data pieces. ### Claim 2 (depends on 1) The signal supply circuit of claim 1, wherein the mode control circuit receives mode control data prior to receiving the first video data pieces or the second video data pieces. ### Claim 3 (depends on 1) The signal supply circuit of claim 1, further comprising: a parallel conversion section; and a line data conversion circuit, wherein the first video data pieces and the second video data pieces belong to serial data, the parallel conversion section parallel converts the serial data to digital data pieces corresponding to the sub-pixels, and the line data conversion circuit changes the output data pieces of the parallel conversion section into digital data pieces for the n sub-pixels. ### Claim 4 (depends on 2) The signal supply circuit of claim 2, further comprising: a parallel conversion section; and a line data conversion circuit, wherein the first video data pieces and the second video data pieces belong to serial data, the parallel conversion section parallel converts the serial data to digital data pieces corresponding to the sub-pixels, and the line data conversion circuit changes the output data pieces of the parallel conversion section into digital data pieces for the n sub-pixels. ### Claim 5 (depends on 1) The signal supply circuit of claim 1, wherein the first video data pieces and the second video data pieces belong to serial data, and the signal supply circuit further comprises a parallel conversion section which parallel converts the serial data to digital data pieces corresponding to the sub-pixels, the parallel conversion section having latching circuits corresponding in number to the sub-pixels, and control registers for controlling latching timing in the latching circuits, and the mode control circuit switching a part of the control registers into a non-active state in the second mode. ### Claim 6 (depends on 2) The signal supply circuit of claim 2, wherein the first video data pieces and the second video data pieces belong to serial data, and the signal supply circuit further comprises a parallel conversion section which parallel converts the serial data to digital data pieces corresponding to the sub-pixels, the parallel conversion section having latching circuits corresponding in number to the sub-pixels, and control registers for controlling latching timing in the latching circuits, and the mode control circuit switching a part of the control registers into a non-active state in the second mode. ### Claim 7 (depends on 1) The signal supply circuit of claim 1, further comprising: a line data conversion circuit generating digital data pieces for the respective sub-pixels, the first video data pieces in the first mode comprising video data pieces for red, green, blue, and white, the second video data pieces in the second mode comprising video data pieces for red, green, and blue, and the line data conversion circuit generating a video data piece for white from the video data pieces for red, green, and blue in the second mode. ### Claim 8 (depends on 2) The signal supply circuit of claim 2, further comprising: a line data conversion circuit generating digital data pieces for the respective sub-pixels, each of the first video data pieces in the first mode comprising video data pieces for red, green, blue, and white, each of the second video data pieces in the second mode comprising video data pieces for red, green, and blue, and the line data conversion circuit generating a video data piece for white from the video data pieces for red, green, and blue in the second mode. ### Claim 9 (depends on 1) The signal supply circuit of claim 1, wherein each the first video data pieces in the first mode comprises video data pieces for red, green, blue, and white, or video data pieces for cyan, magenta, yellow, and white. ### Claim 10 (depends on 2) The signal supply circuit of claim 2, wherein each of the first video data pieces in the first mode comprises video data pieces for red, green, blue, and white, or video data pieces for cyan, magenta, yellow, and white. ### Claim 11 (depends on 1) The signal supply circuit of claim 1, further comprising: parallel conversion section which parallel converts the serial data to digital data pieces corresponding to the sub-pixels, wherein the parallel conversion section parallel converts n second video data pieces into a single video data unit in the second mode. ### Claim 12 (depends on 2) The signal supply circuit of claim 2, further comprising: parallel conversion section which parallel converts the serial data to digital data pieces corresponding to the sub-pixels, wherein the parallel conversion section parallel converts n second video data pieces into a single video data unit in the second mode. ### Claim 13 A display device comprising: pixels, each comprising sub-pixels, a signal supply circuit supplying digital data pieces to the respective sub-pixels, memories arranged in the respective sub-pixels each supplied a corresponding one of the digital data pieces, and pixel electrodes, each supplied electric potential caused by one of the digital data pieces stored in a corresponding one of the memories, the signal supply circuit having a first mode and a second mode, the first mode is a mode to receive first video data pieces for n sub-pixels externally received, and to supply n digital data pieces for the n sub-pixels to the respective memories of the n sub-pixels based on the first video data pieces, and the second mode is a mode to receive second video data pieces for m sub-pixels fewer than the n sub-pixels externally received, and to supply n digital data pieces for the n sub-pixels to the respective memories of the n sub-pixels based on the second video data pieces. ### Claim 14 (depends on 13) The display device of claim 13, wherein each of the pixels comprises a first sub-pixel, a second sub-pixel, a third sub-pixel, and a fourth sub-pixel, the signal supply circuit, in the first mode, receives first video data pieces corresponding to the first sub-pixel, the second sub-pixel, the third sub-pixel, and the fourth sub-pixel, and supplies digital data pieces for the first sub-pixel, the second sub-pixel, the third sub-pixel, and the fourth sub-pixel to the respective memories based on the first video data pieces, and the signal supply circuit, in the second mode, receives second video data pieces corresponding to the first sub-pixel, the second sub-pixel, and the third sub-pixel, and supplies digital data pieces for the first sub-pixel, the second sub-pixel, the third sub-pixel, and for the fourth sub-pixel to the respective memories based on the second video data pieces. ### Claim 15 (depends on 13) The display device of claim 13, wherein the signal supply circuit further has a third mode for supplying digital data pieces corresponding to the sub-pixels to the respective memories, and in the third mode, the signal supply circuit receives externally supplied second video data pieces, and supplies digital data pieces for m sub-pixels to the respective memories based on the second video data pieces. ### Claim 16 (depends on 14) The display device of claim 14, wherein the signal supply circuit further has a third mode for supplying digital data pieces corresponding to the sub-pixels to the respective memories, and in the third mode, the signal supply circuit receives externally supplied second video data pieces, and supplies digital data pieces for m sub-pixels to the respective memories based on the second video data pieces. ### Claim 17 (depends on 13) The display device of claim 13, further comprising a third mode for supplying digital data pieces corresponding to the sub-pixels to the respective memories, wherein the third mode is a mode in which the externally supplied second video data pieces are received, and digital data pieces are supplied to some of the sub pixels based on the second video data pieces, and the third mode is a mode in which the second video data pieces for the first sub-pixel, the second sub-pixel, and the third sub-pixel are received, and digital data pieces for the first sub-pixel, the second sub-pixel, and the third sub-pixel are supplied to the respective memories based on the second video data pieces. ### Claim 18 (depends on 14) The display device of claim 14, further comprising a third mode for supplying digital data pieces corresponding to the sub-pixels to the respective memories, wherein the third mode is a mode in which the externally supplied second video data pieces are received, and digital data pieces are supplied to some of the sub-pixels based on the second video data pieces, and the third mode is a mode in which the second video data pieces for the first sub-pixel, the second sub-pixel, and the third sub-pixel are received, and digital data pieces for the first sub-pixel, the second sub-pixel, and the third sub-pixel are supplied to the respective memories based on the second video data pieces. ### Claim 19 (depends on 17) The display device of claim 17, wherein an externally supplied bit control signal switches between the second mode and the third mode. ### Claim 20 (depends on 13) The display device of claim 13, wherein an externally supplied latching count control signal switches between the first mode and the second mode.