Node topology employing recirculating ring command and data buffers for executing thread scheduling
AssigneeThinCI, Inc.
InventorsVal G. Cook, Satyaki Koneru, Ke Yin, Dinakar C. Munagala
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AssigneeThinCI, Inc.
InventorsVal G. Cook, Satyaki Koneru, Ke Yin, Dinakar C. Munagala
Estimating the term…
The claimed invention discloses system comprising a plurality of logical nodes comprised in a single or plurality of stages, with defined properties and resources associated with each node, for reducing compute resources, said system further comprising: at least a recirculating ring buffer holding only any one of a control information, input, and, or out data necessary to stream a temporary data between node and, or nodes in an execution graph, thereby reducing size of said recirculating ring buffer; said recirculating ring buffer being sufficiently reduced in size to reside in an on-chip cache, such that any one of the control information, input, and, or out data between node and, or nodes need not be stored in memory; wherein the control information further comprises a command related to invalidating any one of the input and, or out data held in a recirculating ring data buffer, clearing the buffer of tasked data; and wherein a producer is stalled from writing any more control information into a recirculating ring command buffer upon the buffer being full, preventing command buffer over-writing, and thereby reducing compute resources associated with a DRAM memory transaction.
A machine configured for increased efficiency processing flow, comprising an arrangement of:
A system encoded as a set of machine-readable instructions stored on non-transitory machine-readable media, the system to employ re-circulating ring buffers to reduce computing power, said system further comprising instructions for implementing:
A non-transitory, machine-readable media, for re-configuring a machine for increased efficiency in processing flow comprising the steps of:
Dependencies are inferred from the claim text.