# US 10,310,986 B1 · Memory management unit for shared memory allocation

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- Number: US 10,310,986 B1
- Document ID: US10310986B1
- Status: Granted
- Kind: B1
- Application number: 15/826,209
- Filed: 2017-11-29
- Granted: 2019-06-04
- Earliest claimed: 2016-03-30
- Assignees: Amazon Technologies, Inc.
- Applicants: Amazon Technologies, Inc.
- Inventors: Andrea Olgiati
- Web page: https://patentgrep.com/patent/US10310986B1

## CPC

- G06F 12/1009: using page tables, e.g. page table structures
- G06F 12/023: {Free address space management}
- G06F 12/1027: using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
- G06F 12/1475: {in a virtual system, e.g. with translation means}
- G06F 2212/1044: Space efficiency improvement
- G06F 2212/152: Virtualized environment, e.g. logically partitioned system
- G06F 2212/656: Address space sharing
- G06F 2212/657: Virtual address space management
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

A system and method for allocating shared inter-process memory by a memory management unit is disclosed. A memory management unit may receive information indicative of allocating a region of shared memory. The information may further indicate that a second process may share access to the memory. The memory management unit may identify corresponding regions of virtual address space for each process, such that the region in each address space maps to the same range of addresses. The memory management unit may virtualize access to the shared memory by mapping from the corresponding regions of the virtual address space.

## Claims

### Claim 1

A system, comprising:
at least one processor; and
at least one memory having stored thereon instructions that, when executed by the at least one processor, cause the system to at least:
receive a request to allocate a portion of a first virtual address space of a first process, the request indicative of sharing data in the portion with a second process;
identify a first region of the first virtual address space and a second region of a second virtual address space of the second process, wherein the first region is allocated from a region of the first virtual address space of at least a minimum size, wherein the second region is allocated from a region of the second virtual address space, and wherein addresses of the first region in the first virtual address space are equal to addresses of the second region in the second virtual address space; and
translate an address in the first region of the first virtual address space to a location in physical memory and translate a corresponding address in the second region of the second virtual address space to the location.

### Claim 2 (depends on 1)

The system of claim 1, the at least one memory having stored thereon instructions that, when executed by the at least one processor, cause the system to at least:
send a notification indicative of a process accessing the physical memory.

### Claim 3 (depends on 1)

The system of claim 1, the at least one memory having stored thereon instructions that, when executed by the at least one processor, cause the system to at least:
send a notification indicative of a process ending access to the physical memory.

### Claim 4 (depends on 1)

The system of claim 1, wherein pointers stored in the physical memory are usable to the second process without translation to another address space.

### Claim 5 (depends on 1)

The system of claim 1, wherein the first and second virtual address spaces are contiguous, and the physical memory is discontiguous.

### Claim 6

A method, comprising:
receiving a request to allocate a portion of a first virtual address space of a first process, the request indicative of sharing data in the portion with a second process;
allocating a first region of the first virtual address space and a second region of a second virtual address space, wherein the first region is allocated from a region of the first virtual address space, wherein the second region is allocated from a region of the second virtual address space, and wherein addresses of the first region in the first virtual address space are aligned with addresses of the second region in the second virtual address space; and
translating an address in the first region of the first virtual address space to a location in a physical memory and translating a corresponding address in the second region of the second virtual address space to the location.

### Claim 7 (depends on 6)

The method of claim 6, further comprising sending a notification indicative of a process accessing the physical memory.

### Claim 8 (depends on 6)

The method of claim 6, further comprising sending a notification indicative of a process ending access to the physical memory.

### Claim 9 (depends on 6)

The method of claim 6, further comprising maintaining data indicative of mapping between virtual and physical addresses, the data comprising a sharing processes indicator.

### Claim 10 (depends on 6)

The method of claim 6, wherein pointers stored in the physical memory are usable to the second process without translation to another address space.

### Claim 11 (depends on 6)

The method of claim 6, wherein aligned addresses of the first and second regions of the first and second virtual address spaces are equivalent.

### Claim 12 (depends on 6)

The method of claim 6, wherein the first and second virtual address spaces are contiguous, and the physical memory is discontiguous.

### Claim 13 (depends on 6)

The method of claim 6, further comprising recycling the first and second regions of virtual memory, based at least in part on information indicating that the first and second processes are no longer accessing the physical memory.

### Claim 14

A non-transitory storage medium having stored thereon executable instructions that, in response to execution by a processor of a computing device, cause the computing device at least to:
receive a request to allocate a portion of a first virtual address space of a first process, the request indicative of sharing data in the portion with a second process;
allocate a first region of the first virtual address space and a second region of a second virtual address space, wherein the first region is allocated from a region of the first virtual address space, wherein the second region is allocated from a region of the second virtual address space, and wherein addresses of the first region in the first virtual address space are aligned with addresses of the second region in the second virtual address space; and
translate an address in the first region of the first virtual address space to a location in a physical memory and translating a corresponding address in the second region of the second virtual address space to the location.

### Claim 15 (depends on 14)

The non-transitory storage medium of claim 14, comprising further instructions that, in response to execution by the processor of the computing device, cause the computing device at least to send a notification indicative of a process accessing the physical memory.

### Claim 16 (depends on 14)

The non-transitory storage medium of claim 14, comprising further instructions that, in response to execution by the processor of the computing device, cause the computing device at least to:
send a notification indicative of a process ending access to the physical memory.

### Claim 17 (depends on 14)

The non-transitory storage medium of claim 14, wherein pointers stored in the physical memory are usable to the second process without translation to another address space.

### Claim 18 (depends on 14)

The non-transitory storage medium of claim 14, wherein the first and second virtual address spaces are contiguous, and the physical memory is discontiguous.

### Claim 19 (depends on 14)

The non-transitory storage medium of claim 14, wherein aligned addresses of the first and second regions of the first and second virtual address spaces are equivalent.

### Claim 20 (depends on 14)

The non-transitory storage medium of claim 14, wherein the first and second processes are provided with virtualized access to the physical memory based at least in part on the translation of the addresses.
