# US 10,310,769 B2 · Memory system and operating method thereof using a bitmap for filtering of logical addresses

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- Number: US 10,310,769 B2
- Document ID: US10310769B2
- Status: Granted
- Kind: B2
- Application number: 15/096,160
- Filed: 2016-04-11
- Published: 2017-05-18
- Granted: 2019-06-04
- Earliest claimed: 2015-11-18
- Assignees: SK hynix Inc.
- Applicants: SK hynix Inc.
- Inventors: Jong-Min Lee
- Web page: https://patentgrep.com/patent/US10310769B2

## CPC

- G06F 3/0659: {Command handling arrangements, e.g. command buffers, queues, command scheduling}
- G06F 3/0608: {Saving storage space on storage systems}
- G06F 3/0626: {Reducing size or complexity of storage systems}
- G06F 3/064: {Management of blocks}
- G06F 3/0679: {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]}
- G06F 3/0685: {Hybrid storage combining heterogeneous device types, e.g. hierarchical storage, hybrid arrays}
- G06F 12/0246: {in block erasable memory, e.g. flash memory}
- G06F 12/0802: Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F 12/1018: involving hashing techniques, e.g. inverted page tables
- G06F 12/1009: using page tables, e.g. page table structures
- G06F 2212/1016: Performance improvement
- G06F 2212/60: Details of cache memory
- G06F 2212/7201: Logical to physical mapping or translation of blocks or pages
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

A memory system may include a memory device comprising a plurality of memory blocks each having a plurality of pages; and a controller suitable for storing data in a first memory block among the memory blocks, storing map data of the data in a second memory block among the memory blocks, and scanning the map data by performing filtering on logical information of the data in response to a command.

## Claims

### Claim 1

A memory system comprising:
a memory device comprising a plurality of memory blocks each having a plurality of pages; and
a controller suitable for storing data in a first memory block among the memory blocks, storing map data of the data in a second memory block among the memory blocks, and scanning the map data regarding logical information of the data in response to a command,
wherein the controller generates a bit map for the logical information of the data when storing the map data,
wherein the controller includes;
a first part suitable for loading partial map data from the second memory block,
a second part, including a memory, suitable for storing generated map data including the bit map for the logical information of the data before storing the generated map data in the second memory block, and
a third part suitable for checking the second part in response to the command to filter by scanning the first part when the second part includes no map data corresponding to the data based on the bit map stored in the memory.

### Claim 2 (depends on 1)

The memory system of claim 1, wherein the bit map includes an identifier (ID) for grouping plural logical information of plural data.

### Claim 3 (depends on 2)

The memory system of claim 2, wherein the controller generates the ID for grouping the plural logical information of the plural data as the bit map through multiple hashes.

### Claim 4 (depends on 3)

The memory system of claim 3, wherein the third part includes:
a filter suitable for performing the filtering,
wherein the controller registers the bit map in a bit array of the filter when storing the map data.

### Claim 5 (depends on 1)

The memory system of claim 1, wherein the first part loads map segments of the map data and a map list for the map segments to a memory of the controller, and the third part checks whether a first map segment corresponding to logical information of a command data corresponding to the command exists in the map list, through the filtering.

### Claim 6 (depends on 5)

The memory system of claim 5, wherein when the first map segment exists in the map list, the controller checks physical information of the first map segment by scanning the map segments.

### Claim 7 (depends on 6)

The memory system of claim 6, wherein the controller performs a command operation corresponding to the command in the memory blocks, based on the physical information.

### Claim 8 (depends on 6)

The memory system of claim 6, wherein the physical information comprises a physical page number (PPN) corresponding to the logical information of the command data.

### Claim 9 (depends on 1)

The memory system of claim 1, wherein the logical information of the data comprises a logical page number (LPN) of the data stored in the first memory block.

### Claim 10

An operating method of a memory system comprising a plurality of memory blocks each having a plurality of pages, comprising:
storing data in a first memory block among the memory blocks;
storing map data of the data in a second memory block among the memory blocks; and
scanning the map data regarding logical information of the data in response to a command,
wherein the scanning of the map data includes:
loading partial map data from the second memory block,
generating a bit map for the logical information of the data,
storing generated map data including the bit map for the logical information of the data in a memory before storing the generated map data in the second memory block, and
checking the generated map data in response to the command to filter by scanning the partial map data when the generated map data includes no map data corresponding to the data based on the bit map stored in the memory.

### Claim 11 (depends on 10)

The operating method of claim 10, wherein the bit map includes an identifier (ID) for grouping plural logical information of plural data.

### Claim 12 (depends on 10)

The operating method of claim 10, wherein the generating of the bit map comprises:
generating the identifier (ID) for grouping the logical information of the plural data; and
generating the ID for the logical information of the data as the bit map through multiple hashes.

### Claim 13 (depends on 12)

The operating method of claim 12, wherein the storing of the bit map in the memory of the controller comprises:
registering the bit map in a bit array of a filter which performs the filtering.

### Claim 14 (depends on 10)

The operating method of claim 10, wherein the loading of the partial map data comprises:
loading map segments of the map data and a map list for the map segments to a memory of a controller, and
wherein the checking of the generated map data comprises checking whether a first map segment corresponding to logical information of a command data corresponding to the command exists in the map list, through the filtering.

### Claim 15 (depends on 14)

The operating method of claim 14, wherein the scanning of the map data further comprises:
checking physical information of the first map segment by scanning the map segments, when the first map segment exists in the map list.

### Claim 16 (depends on 15)

The operating method of claim 15, further comprising:
performing a command operation corresponding to the command in the memory blocks, based on the physical information.

### Claim 17 (depends on 15)

The operating method of claim 15, wherein the physical information comprises a physical page number (PPN) corresponding to the logical information of the command data.

### Claim 18 (depends on 10)

The operating method of claim 10, wherein the logical information of the data comprises a logical page number (LPN) of the data stored in the first memory block.
