# US 10,310,761 B2 · Storage device with dynamic configuration > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,310,761 B2 - Document ID: US10310761B2 - Status: Granted - Kind: B2 - Application number: 15/797,617 - Filed: 2017-10-30 - Published: 2019-03-14 - Granted: 2019-06-04 - Earliest claimed: 2017-09-12 - Assignees: Shanghai Zhaoxin Semiconductor Co., Ltd. - Applicants: Shanghai Zhaoxin Semiconductor Co., Ltd. - Inventors: Zongpu Qi; Di Hu; Wei Zhao; Zheng Wang; Xiaoyang Li - Web page: https://patentgrep.com/patent/US10310761B2 ## CPC - G06F 3/0632: {by initialisation or re-initialisation of storage systems} - G06F 12/0802: Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches - G06F 3/0604: {Improving or facilitating administration, e.g. storage management} - G06F 3/064: {Management of blocks} - G06F 3/0673: {Single storage device} - G06F 12/0223: {User address space allocation, e.g. contiguous or non contiguous base addressing} - G06F 12/08: in hierarchically structured memory systems, e.g. virtual memory systems - G06F 12/0895: of parts of caches, e.g. directory or tag array - G06F 2212/205: Hybrid memory, e.g. using both volatile and non-volatile memory - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract A storage device includes a memory unit, an access monitor, and a memory configurator. The memory unit includes a plurality of memory blocks. The access monitor is configured to monitor whether an access mode of the memory unit is a continuous-access mode or a random-access mode, to generate a monitor signal. The memory configurator configures, according to the monitor signal, any of the memory blocks to be either in a cache mode or a SRAM state to generate a configuration signal. ## Claims ### Claim 1 A storage device, comprising: a memory unit, comprising a plurality of memory blocks; an access monitor, configured to monitor whether an access mode of the memory unit is a continuous-access mode or a random-access mode, to generate a monitor signal; and a memory configurator, configuring, according to the monitor signal, any of the memory blocks to be either in a cache mode or a static random-access memory mode to generate a configuration signal. ### Claim 2 (depends on 1) The storage device of claim 1, wherein the access monitor monitors whether the access mode of a predetermined address range in the memory unit is the continuous-access mode or the random-access mode, wherein when an address of an access request seeking access to the memory unit exceeds the predetermined address range, the access monitor generates the monitor signal to inform the memory configurator. ### Claim 3 (depends on 1) The storage device of claim 1, further comprising: a cache controller, wherein when the memory configurator configures a first memory block of the memory blocks in the memory unit to be in the cache mode, the cache controller operates the first memory block according to the configuration signal; a static random-access memory controller, wherein when the memory configurator configures a second memory block of the memory blocks in the memory unit to be in the static random-access memory mode, the static random-access memory controller operates the second memory block according to the configuration signal; and a routing unit, routing an access request to the cache controller or the static random-access memory controller according to the configuration signal and an address of the access request from an execution unit, so that the execution unit is able to access the memory unit. ### Claim 4 (depends on 1) The storage device of claim 1, wherein the access monitor further comprises: a monitor unit, monitoring whether addresses of two continuous access requests seeking access to the memory unit are continuous, wherein when the addresses of the two continuous access requests are continuous, the monitor generates a first signal, wherein when a difference between the addresses of the two continuous access requests exceeds a predetermined range, the monitor unit generates a second signal; and a continuous-access counter, increasing a continuous-access count according to the first signal; and a random-access counter, increasing a random-access count according to the second signal. ### Claim 5 (depends on 4) The storage device of claim 4, wherein when the continuous-access count exceeds the random-access count by a first difference value, the memory configurator configures a first number of memory blocks in the memory unit to be in the static random-access memory mode and configures a second number of memory blocks to be in the cache mode, wherein the first number exceeds the second number. ### Claim 6 (depends on 4) The storage device of claim 4, wherein when the random-access count exceed the continuous-access count by a second difference value, the memory configurator configures a first number of memory blocks in the memory unit to be in the cache mode and configures a second number of memory blocks to be in the static random-access memory mode, wherein the first number exceeds the second number. ### Claim 7 (depends on 4) The storage device of claim 4, wherein when an address of an access request seeking access to the memory unit exceeds a predetermined address range, the access monitor generates the monitor signal to inform the memory configurator to read the continuous-access count and the random-access count. ### Claim 8 (depends on 4) The storage device of claim 4, wherein, at fixed time intervals, the access monitor generates the monitor signal to inform the memory configurator to read the continuous-access count and the random-access count. ### Claim 9 (depends on 1) The storage device of claim 1, wherein the memory configurator records configuration information, wherein the configuration information comprises an address range of the memory blocks configured to be in the cache mode and ddress range of the memory blocks configured to be in the static random-access memory mode, wherein the memory configurator generates the configuration signal according to the configuration information. ### Claim 10 (depends on 1) The storage device of claim 1, wherein the storage device is deposited in a hardware accelerator, wherein the memory unit is configured to buffer payloads of the hardware accelerator. ### Claim 11 A configuration method, adapted in a memory unit comprising a plurality of memory blocks, comprising: monitoring whether an access mode of the memory unit is a continuous-access mode or a random-access mode, to generate a monitor signal; and configuring any of the memory blocks to be either in a cache mode or a static random-access memory mode according to the monitor signal, to generate a configuration signal. ### Claim 12 (depends on 11) The configuration method of claim 11, wherein the step of monitoring whether the access mode of the memory unit is the continuous-access mode or the random-access mode to generate the monitor signal further comprises: monitoring whether an access mode on a predetermined address range in the memory unit is the continuous-access mode or the random-access mode; and when an address of an access request seeking access to the memory unit exceeds the predetermined address range, generating the monitor signal to configure any of the memory blocks to be either in the cache mode or the static random-access memory mode. ### Claim 13 (depends on 11) The configuration method of claim 11, further comprising: when a first memory block of the memory blocks in the memory unit is configured to be in the cache mode, operating the first memory block according to the configuration signal via a cache controller; when a second memory block of the memory blocks in the memory unit is configured to be in the static random-access memory mode, operating the second memory block according to the configuration signal via a static random-access memory controller; and routing an access request to the cache controller or the static random-access memory controller according to the configuration signal and the address of the access request from an execution unit. ### Claim 14 (depends on 11) The configuration method of claim 11, wherein the step of monitoring whether the access mode of the memory unit is the continuous-access mode or the random-access mode to generate the monitor signal further comprises: monitoring whether addresses of two continuous access requests seeking access to the memory unit are continuous; generating a first signal when the addresses of the two continuous access requests are continuous; increasing a continuous-access count according to the first signal; generating a second signal when a difference of the addresses of the two continuous access requests exceeds a predetermined range; and increasing a random-access count according to the second signal. ### Claim 15 (depends on 14) The configuration method of claim 14, wherein the step of monitoring whether the access mode of the memory unit is the continuous-access mode or the random-access mode to generate the monitor signal further comprises: when the continuous-access count exceeds the random-access count by a first difference, configuring a first number of memory blocks in the memory unit to be in the static random-access memory mode and configuring a second number of memory blocks in the memory unit to be in the cache mode, wherein the first number exceeds the second number. ### Claim 16 (depends on 14) The configuration method of claim 14, wherein the step of monitoring whether the access mode of the memory unit is the continuous-access mode or the random-access mode to generate the monitor signal further comprises: when the random-access count exceeds the continuous-access count by a second difference value, configuring a first number of memory blocks in the memory unit to be in the cache mode and configuring a second number of memory blocks in the memory unit to be in the static random-access memory mode, wherein the first number exceeds the second number. ### Claim 17 (depends on 14) The configuration method of claim 14, wherein the step of monitoring whether the access mode of the memory unit is the continuous-access mode or the random-access mode to generate the monitor signal further comprises: when an address of an access request seeking access to the memory unit exceeds a predetermined address range, generating the monitor signal; and reading the continuous-access count and the random-access count according to the monitor signal. ### Claim 18 (depends on 14) The configuration method of claim 14, wherein the step of monitoring whether the access mode of the memory unit is the continuous-access mode or the random-access mode to generate the monitor signal further comprises: generating the monitor signal at fixed time intervals; and reading the continuous-access count and the random-access count according to the monitor signal. ### Claim 19 (depends on 11) The configuration method of claim 11, further comprising: recording configuration information, wherein the configuration information comprises an address range of the memory blocks configured to be in the cache mode and an address range of the memory blocks configured to be in the static random-access memory mode; and generating the configuration signal according to the configuration information. ### Claim 20 (depends on 11) The configuration method of claim 11, wherein the memory unit is deposited in a hardware accelerator, wherein the memory unit is configured to buffer payloads of the hardware accelerator.