# US 10,310,579 B2 · Semiconductor integrated circuit and power supply switching method

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- Number: US 10,310,579 B2
- Document ID: US10310579B2
- Status: Granted
- Kind: B2
- Application number: 15/635,213
- Filed: 2017-06-28
- Published: 2017-12-28
- Granted: 2019-06-04
- Earliest claimed: 2016-06-28
- Assignees: Lapis Semiconductor Co., Ltd.
- Applicants: LAPIS Semiconductor Co., Ltd.
- Inventors: Suguru Kawasoe
- Web page: https://patentgrep.com/patent/US10310579B2

## CPC

- G06F 1/266: {Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips}
- G06F 1/14: Time supervision arrangements, e.g. real time clock
- G06F 1/28: Supervision thereof, e.g. detecting power-supply failure by out of limits supervision
- G06F 1/3275: {Power saving in memory, e.g. RAM, cache}
- G06F 1/3287: by switching off individual functional units in the computer system
- G06F 1/3296: by lowering the supply or operating voltage
- G11C 5/147: {Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops (G11C5/141 takes precedence)}
- G11C 5/143: {Detection of memory cassette insertion or removal; Continuity checks of supply or ground lines; Detection of supply variations, interruptions or levels (G11C5/148 takes precedence); Switching between alternative supplies (G11C5/141 takes precedence)}
- Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- G11C: STATIC STORES (semiconductor memory devices H10B)
- Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE

## Abstract

A semiconductor integrated circuit capable of efficiently suppressing power consumption when a power supply voltage is lowered is provided. The semiconductor integrated circuit includes: a regulator transforming an external power supply voltage to generate an internal power supply voltage; a processor circuit capable of operating by receiving the internal power supply voltage; a real time clock (RTC) circuit generating current time data by receiving the internal power supply voltage; a supply line supplying the internal power supply voltage to the RTC circuit and to the processor circuit; a changeover switch provided between the supply line and the processor circuit and switching between a connection state and a non-connection state between the supply line and the processor circuit; and a power supply level detection circuit detecting a voltage level of the external power supply voltage, and controlling the changeover switch so as to achieve the non-connection state between the supply line and the processor circuit if detecting that the voltage level is equal to or lower than a predetermined threshold.

## Claims

### Claim 1

A semiconductor integrated circuit, comprising:
a regulator for generating an internal power supply voltage by transforming an external power supply voltage;
a processor circuit configured to operate itself by being supplied with the internal power supply voltage;
a real time clock (RTC) circuit for generating a current time data by being supplied with the internal power supply voltage;
a supply line supplying the internal power supply voltage to the RTC circuit and to the processor circuit;
a changeover switch provided between the supply line and the processor circuit and switching between a connection state and a non-connection state between the supply line and the processor circuit; and
a power supply level detection circuit detecting a voltage level of the external power supply voltage and controlling the changeover switch to achieve the non-connection state between the supply line and the processor circuit if detecting that the voltage level is equal to or lower than a predetermined threshold.

### Claim 2

A semiconductor integrated circuit, comprising:
a first regulator for generating a first internal power supply voltage by transforming an external power supply voltage;
a second regulator for generating a second internal power supply voltage by transforming the external power supply voltage;
a processor circuit configured to operate itself by being supplied with the first internal power supply voltage;
an RTC circuit for generating a current time data by being supplied with the first internal power supply voltage and the second internal power supply voltage;
a first supply line supplying the first internal power supply voltage to the processor circuit;
a second supply line supplying the second internal power supply voltage to the RTC circuit;
a changeover switch provided between the first supply line and the second supply line and switching between a connection state and a non-connection state between the first supply line and the second supply line; and
a power supply level detection circuit detecting a voltage level of the external power supply voltage, and stopping operation of the first regulator and controlling the changeover switch to achieve the non-connection state between the first supply line and the second supply line if detecting that the voltage level is equal to or lower than a predetermined threshold.

### Claim 3 (depends on 2)

The semiconductor integrated circuit according to claim 2, wherein the first regulator, the second regulator, the processor circuit, the RTC circuit, the first supply line, the second supply line, the changeover switch and the power supply level detection circuit are formed on a main surface of a semiconductor substrate, and
a connection pad connected to the first regulator is provided on an outer edge portion of the semiconductor substrate.

### Claim 4 (depends on 3)

The semiconductor integrated circuit according to claim 3, comprising:
a pad group comprising a first power supply pad that receives an input of the external power supply voltage and a second power supply pad that is connected to a ground potential on the outer edge portion of the semiconductor substrate, wherein
the first regulator is arranged in a vicinity of the pad group; and
the second regulator is arranged in a position farther than a position of the first regulator from the pad group.

### Claim 5

A power supply switching method in a semiconductor integrated circuit, the semiconductor integrated circuit comprising: a regulator for generating an internal power supply voltage by transforming an external power supply voltage; a processor circuit configured to operate itself by being supplied with the internal power supply voltage; an RTC circuit for generating a current time data by being supplied with the internal power supply voltage; a supply line supplying the internal power supply voltage to the RTC circuit and to the processor circuit; and a changeover switch provided between the supply line and the processor circuit and switching between a connection state and a non-connection state between the supply line and the processor circuit, wherein the power supply switching method comprises:
a step of detecting a voltage level of the external power supply voltage; and
a step of controlling the changeover switch to achieve the non-connection state between the supply line and the processor circuit if detecting that the voltage level is equal to or lower than a predetermined threshold.