# US 10,310,529 B1 · Linear voltage regulator for low-power digital circuit of chip

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 10,310,529 B1
- Document ID: US10310529B1
- Status: Granted
- Kind: B1
- Application number: 15/950,912
- Filed: 2018-04-11
- Published: 2019-05-16
- Granted: 2019-06-04
- Earliest claimed: 2017-11-13
- Assignees: Aplus Microstructure Electronics Co., Ltd.
- Applicants: Aplus Microstructure Electronics Co., Ltd
- Inventors: Shuihe Cai
- Web page: https://patentgrep.com/patent/US10310529B1

## CPC

- G05F 1/575: characterised by the feedback circuit
- G05F 1/468: {characterised by reference voltage circuitry, e.g. soft start, remote shutdown}
- G05F 1/569: for protection
- G05F 1/461: {using an operational amplifier as final control device}
- G05F: SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES

## Abstract

The present invention relates to a linear voltage regulator for a low-power digital circuit of a chip, comprising a reference voltage varying with a threshold voltage, a buffer formed by amplifiers, and a compensation capacitor. The reference voltage is used as an input end of the buffer, an output voltage of the buffer, having a current driving capability, is kept consistent with the reference voltage, and the compensation capacitor is configured to decrease the fluctuation range of the output voltage when a current load varies. The reference voltage comprises two gate-source voltages of an MOS operating in a sub-threshold region, and the reference voltage Vref satisfies the following relation: Vref∝β(|VGS1|+VGS2); the reference voltage Vref flows through the output buffer formed by the amplifiers to supply a voltage to a digital circuit. By adopting a reference related to the threshold voltage of the MOS, the reference voltage will also vary with the changes in the process conditions and ambient temperature, so that an output of a linear voltage regulator can reflect such changes in the conditions, thereby reducing the operating supply voltage of the digital circuit and greatly reducing the power consumption accordingly.

## Claims

### Claim 1

A linear voltage regulator for a low-power digital circuit of a chip, comprising:
a first metal oxide semiconductor (MOS);
a second metal oxide semiconductor (MOS);
an output buffer formed by at least one amplifier; and
a compensation capacitor;
wherein the first MOS is a PMOS and the second MOS is an NMOS and an input currency is connected to a source of the first MOS; a reference voltage (Vref) outputted from the first MOS the second MOS is used as an input positive end of the buffer; an output voltage of the buffer, having a current driving capability, is kept consistent with the reference voltage, and the compensation capacitor is configured to decrease the fluctuation range of the output voltage when a current load varies; a value of the Vref satisfies the following relation:
Vref∝β(|VGS1|+VGS2);
wherein VGS1 is a gate-source voltage of the first MOS operating in the sub-threshold region, and VGS2 is a second gate-source voltage of the MOS operating in the sub-threshold region; the reference voltage (Vref) flows through the output buffer formed by the at least one amplifier to supply a voltage to a digital circuit.