# US 10,310,347 B2 · Display apparatus and method of manufacturing display apparatus > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,310,347 B2 - Document ID: US10310347B2 - Status: Granted - Kind: B2 - Application number: 15/917,006 - Filed: 2018-03-09 - Published: 2018-07-12 - Granted: 2019-06-04 - Earliest claimed: 2015-09-10 - Assignees: Sakai Display Products Corporation - Applicants: Sakai Display Products Corporation - Inventors: Shigeru Ishida; Nobutake Nodera; Ryouhei Takakura; Yoshiaki Matsushima; Takao Matsumoto; Kazuki Kobayashi; Taimi Oketani - Web page: https://patentgrep.com/patent/US10310347B2 ## CPC - G02F 1/1368: in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)} - G02F 1/13454: {Drivers integrated on the active matrix substrate (G02F1/136277 takes precedence)} - G02F 1/136227: {Through-hole connection of the pixel electrode to the active element through an insulation layer} - G02F 1/136286: {Wiring, e.g. gate line, drain line} - H10D 30/6739: {Conductor-insulator-semiconductor electrodes} - H10D 30/674: {characterised by the active materials} - H10D 30/6745: {Polycrystalline or microcrystalline silicon} - H10D 30/6757: {characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715)} - H10D 86/0231: {using masks, e.g. half-tone masks} - H10D 86/421: {having a particular composition, shape or crystalline structure of the active layer} - H10D 86/425: {having different crystal properties in different TFTs or within an individual TFT} - H10D 86/441: {Interconnections, e.g. scanning lines} - H10D 86/60: wherein the TFTs are in active matrices - G02F 2201/123: pixel - G02F 2202/103: a-Si - G02F: OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract There are provided a display apparatus and a method of manufacturing the display apparatus. The display apparatus includes a pixel having a first thin film transistor and a drive circuit having a second thin film transistor and driving the pixel, wherein a first channel region of the first thin film transistor and a second channel region of the second thin film transistor are configured to have different electrical characteristics (for example, electron mobility, thereby enabling the first thin film transistor and the second thin film transistor to function suitably for the each role thereof). ## Claims ### Claim 1 A display apparatus comprising: a pixel having a first thin film transistor, and a drive circuit having a second thin film transistor and driving the pixel, wherein each of the first thin film transistor and the second thin film transistor comprises a gate electrode, a gate insulating film covering the gate electrode, a first amorphous silicon layer formed on the gate insulating film and including a polysilicon region and an amorphous silicon region, a second amorphous silicon layer covering the first amorphous silicon layer, and a source electrode and a drain electrode formed apart from each other above the second amorphous silicon layer; wherein the first thin film transistor has a first channel region including a first part of the first amorphous silicon layer, the first part being a part between the source electrode and the drain electrode of the first thin film transistor in a top view; wherein the second thin film transistor has a second channel region including a second part of the first amorphous silicon layer, the second part being a part between the source electrode and the drain electrode of the second thin film transistor in a top view; wherein the first channel region includes the amorphous silicon region and the polysilicon region in the first part; wherein the second channel region includes the polysilicon region in the second part, the second channel region does not include the amorphous silicon region in the second part; and wherein electrical characteristic of the first channel region is different from electrical characteristic of the second channel region. ### Claim 2 (depends on 1) The display apparatus of claim 1, wherein the polysilicon region included in the first channel region comprises a first region and a second region being separated from each other; the first region overlaps with the source electrode of the first thin film transistor in a laminating direction of the first amorphous silicon layer with the source electrode and the drain electrode; and the second region overlaps with the drain electrode of the first thin film transistor in the laminating direction. ### Claim 3 (depends on 1) The display apparatus of claim 1, wherein the polysilicon region included in the first channel region has a longer direction in an array direction of the source electrode and the drain electrode of the first thin film transistor; a first end of the polysilicon region in the longer direction overlaps with an end of the source electrode in a laminating direction of the first amorphous silicon layer with the source electrode and the drain electrode, the end of the source electrode facing the drain electrode; and a second end of the polysilicon region opposed to the first end overlaps with an end of the drain electrode in the laminating direction, the end of the drain electrode facing the source electrode. ### Claim 4 (depends on 3) The display apparatus of claim 3, wherein in the first channel region, a dimension of the polysilicon region in a longitudinal direction crossing at a right angle to the longer direction at an intermediate portion between the end of the drain electrode and the end of the source electrode is larger than a dimension of the polysilicon region in the longitudinal direction at a portion between the intermediate portion and the drain electrode or the source electrode. ### Claim 5 (depends on 1) The display apparatus of claim 1, wherein the polysilicon region included in the first channel region is formed at one place and intervenes between an end of the source electrode facing the drain electrode and an end of the drain electrode facing the source electrode; and the polysilicon region included in the first channel region does not overlap with either of the source electrode or the drain electrode in a laminating direction of the first amorphous silicon layer with the source electrode and the drain electrode. ### Claim 6 (depends on 1) The display apparatus of claim 1, wherein crystallinity of polysilicon in the polysilicon region included in the first channel region is different from crystallinity of polysilicon in the polysilicon region included in the second channel region.