# US 10,308,507 B2 · MEMS gap control structures

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- Number: US 10,308,507 B2
- Document ID: US10308507B2
- Status: Granted
- Kind: B2
- Application number: 15/298,499
- Filed: 2016-10-20
- Published: 2017-10-19
- Granted: 2019-06-04
- Earliest claimed: 2015-10-28
- Assignees: InvenSense, Inc.
- Applicants: InvenSense, Inc.
- Inventors: Jong Ii Shin; Peter Smeys; Bongsang Kim
- Web page: https://patentgrep.com/patent/US10308507B2

## CPC

- B81C 1/00682: {Treatments for improving mechanical properties, not provided for in B81C1/00658 - B81C1/0065}
- B81B 3/0078: {Constitution or structural means for improving mechanical properties not provided for in B81B3/007 - B81B3/0075}
- B81C 1/00333: {Aspects relating to packaging of MEMS devices, not covered by groups B81C1/00269 - B81C1/00325}
- B81B 7/02: containing distinct electrical or optical devices of particular relevance for their function, e.g. microelectro-mechanical systems [MEMS] (B81B7/04 takes precedence)
- B81C 2203/0118: Bonding a wafer on the substrate, i.e. where the cap consists of another wafer
- B81C 2203/036: Fusion bonding
- B81C: PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS (making microcapsules or microballoons B01J13/02; processes or apparatus specially adapted for the manufacture or treatment of piezoelectric, electrostrictive or magnetostrictive elements per se H10N30/01)
- B81B: MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES (piezoelectric, electrostrictive or magnetostrictive elements per se H10N30/00, H10N35/00)

## Abstract

Provided herein is a method including forming a cavity in a first side of a first silicon wafer. An oxide layer is formed on the first side and in the cavity. The first side of the first silicon wafer is bonded to a first side of a second silicon wafer, and a gap control structure is deposited on a second side of the second silicon wafer. A MEMS structure is formed in the second silicon wafer. The second side of the second silicon wafer is eutecticly bonded to the third silicon wafer, and the eutectic bonding includes pressing the second silicon wafer to the third silicon wafer.

## Claims

### Claim 1

A method comprising:
forming a cavity in a first side of a first silicon wafer;
forming an oxide layer on the first side and in the cavity;
bonding the first side of the first silicon wafer to a first side of a second silicon wafer;
forming a gap control structure from a second side of the second silicon wafer, wherein the gap control structure and the second silicon wafer are a single continuous component;
forming a MEMS (micro-electro-mechanical systems) structure in the second silicon wafer; and
eutecticly bonding a standoff formed from the second side of the second silicon wafer to the third silicon wafer, wherein
the gap control structure is distinct from the standoff eutecticly bonding the second silicon wafer to the third silicon wafer,
the eutectic bonding includes pressing the second silicon wafer to a structure formed on a third silicon wafer, and
the gap control structure remains in contact with the structure on the third silicon wafer after the eutectic bonding.

### Claim 2 (depends on 1)

The method of claim 1, wherein the gap control structure includes silicon, silicon nitride, or silicon dioxide.

### Claim 3 (depends on 1)

The method of claim 1, wherein the gap control structure prevents a narrowing of a gap between the second silicon wafer and the third silicon wafer beyond the gap control structure during the pressing.

### Claim 4 (depends on 1)

The method of claim 1, wherein the pressing includes applying an uneven pressure to the second silicon wafer or the third silicon wafer.

### Claim 5 (depends on 1)

The method of claim 1, wherein the eutecticly bonding the second side of the second silicon wafer to the third silicon wafer forms a hermetic seal.

### Claim 6 (depends on 5)

The method of claim 5, wherein the gap control structure is inside the hermetic seal.

### Claim 7 (depends on 5)

The method of claim 5, wherein the gap control structure is outside the hermetic seal.

### Claim 8 (depends on 1)

The method of claim 1, wherein the gap control structure contacts a rigid portion of the third silicon wafer.

### Claim 9

A method comprising:
bonding a handle substrate to a structural layer;
etching the structural layer to form standoffs;
forming a gap control structure from a second side of the structural layer by etching;
forming a MEMS (micro-electro-mechanical systems) structure in the structural layer; and
eutecticly bonding the standoffs formed from the structural layer to an IC (integrated circuit) substrate, wherein
the gap control structure is distinct from the standoffs eutecticly bonding the structural layer to the IC substrate,
a gap is formed between the MEMS structure and the IC substrate, and
the gap control structure remains in contact with a structure formed on the IC substrate after the eutectic bonding.

### Claim 10 (depends on 9)

The method of claim 9, wherein the eutecticly bonding the structural layer to the IC substrate includes forming an aluminum-germanium bond.

### Claim 11 (depends on 9)

The method of claim 9, wherein the gap control structure maintains a predetermined gap between the MEMS structure and an electrode on the IC substrate.

### Claim 12 (depends on 9)

The method of claim 9, wherein the eutecticly bonding includes pressing together the structural layer and IC substrate, and the gap control structure sets a size of the gap.

### Claim 13 (depends on 9)

The method of claim 9, wherein the gap control structure prevents a narrowing of the gap during the eutecticly bonding.

### Claim 14 (depends on 9)

The method of claim 9, wherein forming the gap control structure includes further etching the structural layer to form the gap control structure.

### Claim 15 (depends on 9)

The method of claim 9, wherein the gap control structure contacts a rigid portion of the IC substrate.
