Method for determining the parameters of an IC manufacturing process model
AssigneeAselta Nanographics
InventorsMohamed Saib, Patrick Schiavone, Thiago Figueiro
Life of this patent
Estimating the term…
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AssigneeAselta Nanographics
InventorsMohamed Saib, Patrick Schiavone, Thiago Figueiro
Estimating the term…
An IC manufacturing model is disclosed, wherein input variables and an output variable are measured using a calibration set of patterns. The model can or cannot include a PSF. The output variable may be a dimensional bias between printed patterns and target patterns or simulated patterns. It can also be a Threshold To Meet Experiments. The input variables may be defined by a metric which uses kernel functions, preferably with a deformation function which includes a shift angle and a convolution procedure. A functional or associative relationship between the input variables and the output variable is defined. Preferably this definition includes normalization steps and interpolation steps. Advantageously, the interpolation step is of the kriging type. The invention achieves a much more accurate modeling of IC manufacturing, simulation or inspection processes.
A computer-implemented method of determining, with a computer, a process model for manufacturing a semiconductor integrated circuit defined by a target design to be printed on a substrate, said method comprising:
A computer program for determining a process model for manufacturing a semiconductor integrated circuit defined by a target design to be printed on a substrate, said computer program comprising:
Dependencies are inferred from the claim text.