Array substrate and liquid crystal display panel
AssigneeWuhan China Star Optoelectronics Technology Co., Ltd.
InventorsQipei Zhang, Caiqin Chen
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Abstract
The present disclosure discloses an array substrate and a liquid crystal display panel. The thin film transistors are arranged matrix on the array substrate, a first passivation layer is arranged on the source/drain electrode of the thin film transistors, an organic transparent layer is arranged on the first passivation layer and is located in an area other than the area of the thin film transistors and the area between the adjacent two thin film transistors, post spacers are arranged on the surface of the array substrate, and is located between any two of the thin film transistors. By way of the above, the present disclosure can prevent the PS sliding in the hole of the organic transparent layer, it is possible to increase the stability of the PS.
Claims18
An array substrate, wherein, thin film transistors are arranged matrix on the array substrate, a first passivation layer is arranged on the source/drain electrode of the thin film transistors, an organic transparent layer is arranged on the first passivation layer and is located in an area other than the area of the thin film transistors and the area between the adjacent two thin film transistors, post spacers are arranged on the surface of the array substrate, and is located between any two of the thin film transistors;
- wherein the organic transparent layer is wholly digging a hole along the gate electrode direction of the thin film transistors to form the hole.
A liquid crystal display panel, wherein, the liquid crystal display panel comprises:
- a color film substrate, an array substrate, liquid crystal and post spacers sandwiched between the color film substrate and the array substrate;
- thin film transistors are arranged matrix on the array substrate, a first passivation layer is arranged on the source/drain electrode of the thin film transistors, an organic transparent layer is arranged on the first passivation layer and is located in an area other than the area of the thin film transistors and the area between the adjacent two thin film transistors, post spacers are arranged on the surface of the array substrate, and is located between any two of the thin film transistors;
- wherein the organic transparent layer is wholly digging a hole along the gate electrode direction of the thin film transistors to form the hole.
Dependencies are inferred from the claim text.