TFT array having conducting lines with low resistance

A pixel structure for use in a display panel comprising a substrate having a substrate surface, said pixel structure comprising:

• a switching element and a storage capacitor formed on the substrate, wherein
• the switching element comprises:
• a first gate electrode,
• a semiconductor layer,
• a first dielectric layer between the first gate electrode and the semiconductor layer, and
• a source electrode and a drain electrode separately disposed on the semiconductor layer, and wherein
• the storage capacitor comprises:
• a first storage capacitor electrode,
• a second storage capacitor electrode,
• a second dielectric layer between the first storage capacitor electrode and the second storage capacitor electrode, wherein the pixel structure further comprises:
• a source line electrically connected to the source electrode;
• a gate line electrically connected to the first gate electrode;
• a common line electrically connected to the first storage capacitor electrode;
• a plurality of grooves made on the substrate, and
• a plurality of conducting lines formed in the grooves to provide the gate line, the source line and the common line, wherein each of the conducting lines has a line surface adjacent to the substrate surface and wherein at least part of one of the first gate electrode and the source electrode is disposed on top of and in contact with the line surface of one of the conducting lines.