Voltage sampling switch

A voltage sampling circuit, comprising:

• a first capacitor having a first terminal and a second terminal;
• a first pre-charge circuit coupled to a first voltage supply terminal and to the first terminal of the first capacitor, the first pre-charge circuit configured to receive a first control signal and pre-charge the first capacitor to a first voltage;
• a boost select circuit having a first input coupled to the first terminal of the first capacitor and an output coupled to a boost node;
• a switch circuit comprising:
• a first transistor having a first current electrode coupled to an input terminal of the voltage sampling circuit, a control electrode coupled to the first terminal of the first capacitor, and a body electrode coupled to the second terminal of the first capacitor;
• and
• a second transistor having a first current electrode coupled to a second current electrode of the first transistor, a body electrode coupled to the second terminal of the first capacitor, and a second current electrode coupled to an output terminal of the voltage sampling circuit.

A method comprising:

• providing an input voltage signal to an input terminal of a voltage sampling circuit, the input voltage signal having a voltage range including a voltage higher than a voltage rating of gate oxide for transistors in the voltage sampling circuit;
• transferring a sampled voltage to an output terminal of the voltage sampling circuit by way of a switch circuit coupled between the input terminal and the output terminal, the switch circuit comprising:
• a first transistor having a first current electrode coupled to the input terminal, a control electrode coupled to a first terminal of a first capacitor, and a body electrode coupled to a second terminal of the first capacitor;
• and
• a second transistor having a first current electrode coupled to a second current electrode of the first transistor, a control electrode coupled to a boost node, a second current electrode coupled to the output terminal, and a body electrode coupled to the second terminal of the first capacitor;
• and
• coupling a boosted voltage at the first terminal of a first capacitor to the boost node by way of a boost select circuit, the boosted voltage higher than the sampled voltage, the boost select circuit comprising:
• a third transistor having a first current electrode coupled to the first terminal of the first capacitor and a second current electrode coupled to a control electrode of the second transistor at the boost node;
• and
• a fourth transistor having a first current electrode coupled to a control electrode of the third transistor, a control electrode coupled to the boost node, a second current electrode coupled to the second terminal of the first capacitor, and a body electrode coupled to the second terminal of the first capacitor.