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US 10,270,585 B2Granted
Clock synchronizer and method of establishing an output clock
AssigneeChristopher Julian Travis
InventorChristopher Julian Travis
Life of this patent
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Abstract
A hybrid numeric-analog clock synchronizer for establishing a clock or carrier locked to a frequency reference. The clock synchronizer is typically a clock multiplier and a jitter attenuator. The reference may have a low update rate. The synchronizer achieves high jitter rejection, low phase noise and wide frequency range. It can be integrated on chip.
Claims23
A clock synchronizer for establishing an output clock on a basis of a frequency reference, the clock synchronizer comprising:
- a first loop filter, arranged to attenuate jitter of the frequency reference to produce a numeric control signal;
- a first feedback of the output clock, arranged so that said numeric control signal is partially based on said first feedback
- a fractional frequency divider which incorporates noise shaping arranged to establish an intermediate clock by frequency-dividing the output clock on a basis of said numeric control signal;
- a second loop filter, arranged to attenuate jitter of said intermediate clock to produce an analog control signal;
- and
- an analog-controlled oscillator, arranged to establish the output clock on a basis of said analog control signal.
3 more elements
A method of establishing an output clock on a basis of a frequency reference, the method comprising:
- attenuating jitter of the frequency reference to produce a numeric control signal;
- establishing and using a first feedback of the output clock for producing said numeric control signal, so that said numeric control signal is partially based on said first feedback;
- providing an intermediate clock by performing fractional frequency division of the output clock on a basis of said numeric control signal, wherein said fractional frequency division incorporates noise shaping;
- attenuating jitter of said intermediate clock to produce an analog control signal;
- and
- providing the output clock on a basis of said analog control signal.
3 more elements
Dependencies are inferred from the claim text.