Ultra-low working voltage rail-to-rail operational amplifier, and differential input amplification-stage circuit and output-stage circuit thereof

An ultra-low working voltage rail-to-rail operational amplifier, comprising:

• a differential input amplification-stage circuit, comprising:
• a voltage source comprising a first voltage output end, a second voltage output end, and a third voltage output end,
• a first bulk-driven transistor and a second bulk-driven transistor, wherein the first bulk-driven transistor is configured to receive a first input voltage and convert the first input voltage into a first output current, wherein the first voltage output end is connected to the first bulk-driven transistor and to the second bulk-driven transistor, and wherein the first voltage output end is configured to output a control voltage to the first bulk-driven transistor and the second bulk-driven transistor,
• the second bulk-driven transistor is configured to receive a second input voltage and convert the second input voltage into a second output current,
• a first mirror current source connected to the first bulk-driven transistor and the second voltage output end, wherein the first mirror current source is configured to receive the first output current,
• a second mirror current source connected to the second bulk-driven transistor and the third voltage output end, wherein the second mirror current is configured to receive the second output current,
• a differential amplifier connected to the first voltage input end and the third voltage output end, wherein the differential amplifier is configured to:
• output a first adjustment current to the first mirror current source in response to the first voltage output end outputting a voltage, and
• output a second adjustment current to the second mirror current source in response to the third voltage output end outputting a voltage,
• wherein the first mirror current source is configured to output a first predetermined current to an output-stage circuit according to the first output current and the first adjustment current, and
• wherein the second mirror current source is configured to output a second predetermined current to the output-stage circuit according to the second output current and the second adjustment current to maintain a transconductance constancy of the differential input amplification-stage circuit;
• and
• the output-stage circuit connected to the differential input amplification-stage circuit, the output stage circuit comprising:
• an amplifier configured to:
• receive the first predetermined current and the second predetermined current from the differential input amplification-stage circuit,
• amplify the first predetermined current and the second predetermined current, and
• output a first amplified current and a second amplified current, and
• an output unit connected to the amplifier, wherein the output unit is configure to:
• receive the first amplified current and the second amplified current,
• perform differencing and phase inversion on the first amplified current and the second amplified current, and
• convert the first amplified current and the second amplified current into an output voltage so that the output voltage falls is between a working voltage and zero volts.

A method implemented by a differential input amplification-stage circuit configured to connect to an output-stage circuit, the method comprising:

• receiving, by a first bulk-driven transistor of the differential input amplification-stage circuit, a first input voltage;
• converting, by the first bulk-driven transistor of the differential input amplification-stage circuit, the first input voltage to a first output current;
• receiving, by a second bulk-driven transistor of the differential input amplification-stage circuit, a second input voltage;
• converting, by the second bulk-driven transistor of the differential input amplification-stage circuit, the second input voltage to a second output current;
• receiving, by the first bulk-driven transistor of the differential input amplification-stage circuit and by the second bulk-driven transistor of the differential input amplification-stage circuit;
• a control voltage from a first voltage output end of a voltage source of the differential input amplification-stage circuit;
• outputting, by the first bulk-driven transistor of the differential input amplification-stage circuit, the first output current to a first mirror current source of the differential input amplification-stage circuit;
• outputting, by the second bulk-driven transistor of the differential input amplification-stage circuit, the second output current to a second mirror current source of the differential input amplification-stage circuit;
• outputting, by a differential amplifier of the differential input amplification-stage circuit, a first adjustment current to the first mirror current source in response to the first voltage output end of the voltage source outputting a voltage, wherein the differential amplifier is connected to the first voltage output end and a third voltage output end of the voltage source;
• outputting, by the differential amplifier of the differential input amplification-stage circuit, a second adjustment current to the second mirror current source in response to a second voltage output end of the voltage source outputting a voltage;
• outputting, by the first mirror current source of the differential input amplification-stage circuit, a first predetermined current for reception by the output-stage circuit according to the first output current and the first adjustment current;
• and
• outputting, by the second mirror current source of the differential input amplification-stage circuit, a second predetermined current for reception by the output-stage circuit according to the second output current and the second adjustment current.