Solid-state imaging device

A solid-state imaging device comprising:

• a pixel circuit that outputs an analog pixel signal having a voltage based on the amount of incident light;
• a first reference voltage generation circuit that generates two types of first reference voltage, namely, a first reference voltage for a first voltage and a first reference voltage for a second voltage lower than the first voltage;
• a second reference voltage generation circuit that generates N types of second reference voltage based on resistance division;
• and
• a successive approximation A/D converter that performs A/D conversion on the analog pixel signal based on the first and second reference voltages;
• wherein the successive approximation A/D converter includes:
• a D/A converter that converts a digital reference signal to an analog reference signal;
• a comparator that compares the magnitude of the analog pixel signal with the magnitude of the analog reference signal and outputs a signal indicative of the result of comparison;
• and
• a successive approximation register that operates based on the result of comparison by the comparator in order to generate the digital reference signal in such a manner that the analog reference signal approximates the analog pixel signal, and
• wherein the D/A converter includes:
• a split capacitor that has one electrode coupled to an output node;
• a plurality of first capacitors that each have one electrode coupled to the output node;
• a plurality of second capacitors that are coupled to the other electrode of the split capacitor;
• a switch array that is coupled to the other electrode of each of the first and second capacitors and is adapted to generate the analog reference signal at the output node by selectively applying the first reference voltage;
• a third capacitor that has one electrode coupled to the other electrode of the split capacitor;
• and
• a multiplexer that is coupled to the other electrode of the third capacitor and is adapted to generate the analog reference signal at the output node by selectively applying the second reference voltage.