Data packet switching within a communications network including aggregated links
AssigneeJuniper Networks, Inc.
InventorRavi Shekhar
Life of this patent
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AssigneeJuniper Networks, Inc.
InventorRavi Shekhar
Estimating the term…
In one embodiment, an apparatus includes a memory, a communications interface and a processor. The processor is operatively coupled to the memory and the communications interface. The processor is configured to receive, at a first time, a label identifier associated with an aggregated link within the communications network via the communications interface. The aggregated link including a plurality of redundant links. The processor is configured to receive, at a second time after the first time, a data packet including the label identifier via the communications interface. The processor is configured to send at least a portion of the data packet via a first link separate from the aggregated link based on the label identifier. The processor is configured to not send the data packet via a link from the plurality of redundant links of the aggregated link based on the label identifier.
An apparatus, comprising:
A non-transitory processor-readable medium storing code representing instructions to be executed by a processor, the code comprising code to cause the processor to:
A non-transitory processor-readable medium storing code representing instructions to be executed by a processor, the code comprising code to cause the processor to:
Dependencies are inferred from the claim text.