Method and apparatus for decision directed common phase error estimation based on soft information
AssigneeSamsung Electronics Co., Ltd.
InventorsBinnan Zhuang, Hongbing Cheng, Jungwon Lee
Life of this patent
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Abstract
A method and apparatus are provided. The method includes receiving, by at least one antenna of a receiver, at least one signal from a transceiver, detecting at least one data symbol within the at least one signal, determining a probability associated with the at least one detected data symbol, determining channel state information (CSI) of at least one channel between the transceiver and the at least one antenna of the receiver, and estimating a common phase error (CPE) of the at least one signal based on the probabilities associated with the at least one detected data symbol and the CSI of the at least one channel.
Claims20
A method, comprising:
- receiving, by at least one antenna of a receiver, at least one signal from a transceiver;
- detecting at least one data symbol within the at least one signal;
- determining a probability associated with the at least one detected data symbol;
- determining channel state information (CSI) of at least one channel between the transceiver and the at least one antenna of the receiver;
- estimating a common phase error (CPE) of the at least one signal based on the probability associated with the at least one detected data symbol and the CSI of the at least one channel;
- determining multiple probabilities associated with the at least one detected data symbol;
- determining a soft mean of the determined multiple probabilities;
- and
- estimating the CPE of the at least one signal based on the soft mean of the determined multiple probabilities associated with the at least one detected data symbol.
An apparatus, comprising:
- a memory;
- a processor;
- at least one antenna;
- and
- a receiver configured to:
- receive, by the at least one antenna, at least one signal from a transceiver,
- detect at least one data symbol within the at least one signal,
- determine a probability associated with the at least one detected data symbol,
- determine channel state information (CSI) of at least one channel between the transceiver and the at least one antenna,
- estimate a common phase error (CPE) of the at least one signal based on the probability associated with the at least one detected data symbol and the CSI of the at least one channel,
- determine multiple probabilities associated with the at least one detected data symbol,
- determine a soft mean of the determined multiple probabilities, and
- estimate the CPE of the at least one signal based on the soft mean of the determined multiple probabilities associated with the at least one detected data symbol.
A method of manufacturing a processor, comprising:
- forming the processor as part of a wafer or package that includes at least one other processor, wherein the processor is configured to receive, by at least one antenna, at least one signal from a transceiver, detect at least one data symbol within the at least one signal, determine a probability associated with the at least one detected data symbol, determine channel state information (CSI) of at least one channel between the transceiver and the at least one antenna, estimate a common phase error (CPE) of the at least one signal based on the probability associated with the at least one detected data symbol and the CSI of the at least one channel, determine multiple probabilities associated with the at least one detected data symbol, determine a soft mean of the determined multiple probabilities, and estimate the CPE of the at least one signal based on the soft mean of the determined multiple probabilities associated with the at least one detected data symbol and
- testing the processor, which includes testing the processor and at least one other processor using one or more electrical to optical converters, one or more optical splitters that split an optical signal into two or more optical signals, and one or more optical to electrical converters.
A method of constructing an integrated circuit, comprising:
- generating a mask layout for a set of features for a layer of the integrated circuit, wherein the mask layout includes standard cell library macros for one or more circuit features that include a processor configured to receive, by at least one antenna, at least one signal from a transceiver, detect at least one data symbol within the at least one signal, determine a probability associated with the at least one detected data symbol, determine channel state information (CSI) of at least one channel between the transceiver and the at least one antenna, and estimate a common phase error (CPE) of the at least one signal based on the probability associated with the at least one detected data symbol and the CSI of the at least one channel, and
- disregarding relative positions of the macros for compliance to layout design rules during the generation of the mask layout;
- checking the relative positions of the macros for compliance to layout design rules after generating the mask layout;
- upon detection of noncompliance with the layout design rules by any of the macros, modifying the mask layout by modifying each of the noncompliant macros to comply with the layout design rules;
- generating a mask according to the modified mask layout with the set of features for the layer of the integrated circuit;
- and
- manufacturing the integrated circuit layer according to the mask.
Dependencies are inferred from the claim text.