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US 10,256,831 B2Granted
Method and apparatus to reduce effect of dielectric absorption in SAR ADC
AssigneeAnalog Devices Global
InventorsSandeep Monangi, Mahesh Madhavan
Life of this patent
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Abstract
A successive approximation register analog to digital converter (SAR ADC) is provided in which impact of dielectric absorption is reduced with a correction circuit configured to adjust a present digital code value signal based at least in part upon a previous digital code value signal, an acquisition time and temperature.
Claims26
An analog to digital converter (ADC) comprising:
- a converter circuit configured to produce a first digital conversion output signal value based upon a first analog signal input to the ADC and to produce a second digital conversion output signal value based upon a second analog signal input to the ADC selected subsequent to selection of the first analog signal;
- and
- a correction circuit configured to:
- receive the first and second digital conversion output signal values;
- receive at least one of an acquisition time signal or a temperature signal, the acquisition time signal representing a duration of time between two adjacent analog to digital conversions;
- and
- determine a corrected version of the second digital conversion output value using information about the first digital conversion output value and the received at least one of the acquisition time signal or temperature signal.
4 more elements
A method to reduce dielectric absorption in an analog to digital converter (ADC), the method comprising:
- producing a first digital conversion output signal value in response to a first analog input to the ADC;
- producing a second digital conversion output signal value in response to a second analog input to the ADC selected subsequent to selection of the first analog input;
- receiving at least one of an acquisition time signal or a temperature signal, the acquisition time signal representing a duration of time between two adjacent analog to digital conversions;
- determining a scaled first digital conversion output value based at least in part upon the received at least one of the acquisition time signal or the temperature signal;
- and
- adjusting the second digital conversion output signal value based at least in part upon the determined scaled first digital conversion output value.
3 more elements
An apparatus comprising:
- means for producing a first digital conversion output signal value in response to a first analog input to an analog to digital converter (ADC);
- means for producing a second digital conversion output signal value in response to a second analog input to the ADC selected subsequent to selection of the first analog input;
- means for receiving at least one of an acquisition time signal or a temperature signal, the acquisition time signal representing a duration of time between two adjacent analog to digital conversions;
- means for producing a corrected version of the first digital conversion output value based at least in part upon the received at least one of the acquisition time signal or the temperature signal;
- and
- means for producing a corrected version of the second digital conversion output signal value based at least in part upon the corrected version of the first digital conversion output value.
3 more elements
Dependencies are inferred from the claim text.