Clock generation circuit
AssigneeSK hynix Inc.
InventorsHae-Rang Choi, Yong-Ju Kim, Dae-Han Kwon, Shin-Deok Kang
Life of this patent
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Abstract
A clock generation circuit includes a clock generation unit suitable for generating a first clock, a first inversion clock having an opposite phase to the first clock, a second clock having a different phase from the first clock, and a second inversion clock having an opposite phase to the second clock; and a reset control unit suitable for comparing the phases of the first and second clocks, and controlling the clock generation unit to disable for a time and then enable the second clock and the second inversion clock when the second clock leads the first clock.
Claims10
A clock generation circuit, comprising:
- a clock generation unit suitable for generating a first clock, a first inversion clock having an opposite phase to the first clock, a second clock having a different phase from the first clock, and a second inversion clock having an opposite phase to the second clock;
- a phase comparison unit suitable for comparing the phases of the first and second clocks;
- and
- a clock transfer unit suitable for transferring the first clock, the second clock, the first inversion clock, and the second inversion clock as first to fourth output clocks in accordance with a relationship based on the comparison result.
Dependencies are inferred from the claim text.