Level shifter

A circuit for translating an input signal from a source voltage domain to an output signal for a destination voltage domain that is different than the source voltage domain, the circuit comprising:

• a level shifting portion configured to operate with a supply voltage that exceeds a stressing threshold of one or more components within the circuit, wherein the level shifting portion is configured to generate the output signal for the destination voltage domain based on the input signal from the source voltage domain and a power management signal, wherein the source voltage domain includes operating voltages of less than 0.5 volts, and wherein the one or more components operate within the operating voltages of less than 0.5 volts, wherein the level shifting portion comprises a cross-coupled pair of thick oxide transistors that are configured to receive the supply voltage;
• an isolating portion having a pair of thick oxide N-type transistors that are configured to isolate the one or more components from the supply voltage during activation and deactivation of the circuit based on the power management signal, wherein the isolating portion is coupled between the cross-coupled pair of thick oxide transistors and the one or more components, and wherein a respective thick oxide N-type transistor of the isolator is configured to at least reduce a gate voltage of a first thin oxide P-type transistor of the one or more components;
• and
• a gate tracking portion configured to operate with a core supply voltage in the source voltage domain, wherein the pair of thick oxide N-type transistors of the isolating portion are coupled between the cross-coupled pair of thick oxide transistors and the gate tracking portion.

A method for translating an input signal from a source voltage domain to an output signal for a destination voltage domain, the method comprising:

• operating a level shifting circuit with multiple supply voltages in different voltage domains, wherein at least one supply voltage of the multiple supply voltages exceeds a stressing threshold of one or more thin oxide transistors in the level shifting circuit, wherein the source voltage domain includes operating voltages of less than 0.5 volts, and the one or more thin oxide transistors operate within the operating voltages of less than 0.5 volts, wherein the level shifting circuit comprises a cross-coupled pair of thick oxide transistors that are configured to receive the at least one supply voltage;
• tracking the level shifting circuit with one or more gate trackers to ensure that a voltage drop across the one or more thin oxide transistors is less than or equal to the stressing threshold;
• isolating the one or more thin oxide transistors from the at least one supply voltage during power-up and power-down of the level shifting circuit based on activating a power management signal, wherein a pair of thick oxide N-type transistors are coupled between the cross-coupled pair of thick oxide transistors and the one or more thin oxide transistors for isolating the one or more thin oxide transistors from the at least one supply voltage based on the power management signal, and wherein the pair of thick oxide N-type transistors are coupled between the cross-coupled pair of thick oxide transistors and the one or more gate trackers, and wherein the pair of thick oxide N-type transistors are for at least reducing a gate voltage of a first thin oxide P-type transistor;
• and
• generating the output signal for the destination voltage domain based on the input signal from the source voltage domain and the power management signal.