Delay-locked loop circuit and selection method of unit coarse delay thereof
AssigneeWinbond Electronics Corp.
InventorsJoonho Kim, Chi-Hsiang Sun
Life of this patent
Estimating the term…
Abstract
A delay-locked loop circuit and a selection method of unit coarse delay are provided. The delay-locked loop circuit includes a frequency detector and a unit coarse delay selector. The frequency detector receives a reset signal and a clock signal. The frequency detector performs a sampling operation to detect a clock frequency of the clock signal based on a time shift of the reset signal and a sequential delay of the reset signal to generate a plurality of determining signals. The unit coarse delay selector selects one of the plurality of determining signals with an earliest transition time as a selected coarse delay signal to control a timing of the delay-locked loop circuit.
Claims12
A delay-locked loop circuit, comprising:
- a frequency detector, receiving a reset signal and a clock signal, wherein the frequency detector is configured to perform a sampling operation to detect a clock frequency of the clock signal based on a time shift of the reset signal and a sequential delay of the reset signal to generate a plurality of determining signals;
- and
- a unit coarse delay selector, coupled to the frequency detector, wherein the unit coarse delay selector is configured to select one of the plurality of determining signals with an earliest transition time as a selected coarse delay signal to control a timing of the delay-locked loop circuit.
A selection method of unit coarse delay, applicable to a delay-locked loop circuit comprising a frequency detector and a unit coarse delay selector, the selection method of unit coarse delay comprising:
- receiving a reset signal and a clock signal by the frequency detector;
- performing a sampling operation by the frequency detector to detect a clock frequency of the clock signal based on a time shift of the reset signal and a sequential delay of the reset signal to generate a plurality of determining signals;
- and
- selecting, by the unit coarse delay selector, one of the plurality of determining signals with an earliest transition time as a selected coarse delay signal to control a timing of the delay-locked loop circuit.
Dependencies are inferred from the claim text.