Semiconductor apparatus and system including plurality of channels
AssigneeSK hynix Inc.
InventorsChun Seok Jeong, Jung Hwan Lee
Life of this patent
Estimating the term…
Abstract
A semiconductor apparatus includes a direct access section, an interface section, and a through-via region. The direct access section receives first and second groups of input signals through a direct access pad, and generates first and second groups of control signals based on the first and second groups of input signals. The interface section comprises a plurality of channel circuits suitable for receiving a part or all of the first and second groups of control signals in response to a plurality of channel selection signals. The through-via region electrically couples the plurality of channel circuits and a plurality of stack dies to form a plurality of channels, respectively.
Claims19
A semiconductor apparatus comprising:
- a direct access section suitable for receiving first and second groups of input signals through a direct access pad, and generating first and second groups of control signals based on the first and second groups of input signals;
- an interface section comprising a plurality of channel circuits suitable for receiving a part or all of the first and second groups of control signals in response to a plurality of channel selection signals;
- and
- a through-via region suitable for electrically coupling the plurality of channel circuits and a plurality of stack dies to form a plurality of channels, respectively, and transferring signals from the plurality of channel circuits to the plurality of stack dies respectively corresponding to the plurality of channel circuits,
- wherein the direct access section, the through-via region, and each of the plurality of channel circuits are encompassed in a base die.
A semiconductor apparatus comprising:
- a direct access section suitable for generating first and second groups of control signals based on first and second groups of input signals received through a direct access pad;
- and
- an interface section comprising:
- a plurality of channel circuits suitable for being activated in response to a plurality of channel selection signals, and
- a main buffer suitable for transmitting one of the first and second groups of control signals to a part of the plurality of channel circuits, and transmitting the other one of the first and second groups of control signals to the rest of the plurality of channel circuits in response to a plurality of reception selection signals,
- wherein the direct access section, the main buffer, and each of the plurality of channel circuits are encompassed in a base die.
A system comprising:
- a controller;
- and
- a semiconductor apparatus comprising a base die and a plurality of stack dies,
- wherein the base die comprises:
- a direct access section suitable for generating first and second groups of control signals and a plurality of channel selection signals based on first and second groups of input signals received through a direct access pad;
- and
- an interface section comprising a plurality of channel circuits suitable for receiving a part or all of the first and second groups of control signals in response to the plurality of channel selection signals,
- wherein the each of the plurality of channel circuits are encompassed in the base die.
Dependencies are inferred from the claim text.