Semiconductor device including an ESD protective element

A semiconductor device, comprising:

• an input switch circuit group connected to a plurality of input terminals;
• a through-switch circuit group connected to a plurality of output terminals;
• and
• a plurality of low-noise amplifiers connected between the input switch circuit group and the through-switch circuit group, each low-noise amplifier having:
• an input node to receive a first signal;
• an output node to output a second signal corresponding to the first signal;
• a first transistor having a gate that receives the first signal from the input node and thereby outputs an amplified first signal;
• a second transistor connected between a drain of the first transistor and the output node;
• a first inductor connected between a source of the first transistor and a ground potential node;
• a first capacitor connected between the gate of the first transistor and the input node;
• and
• an electrostatic discharge (ESD) protective element connected between a first node and a second node, the first node being between the first inductor and the first transistor, the second node being between the input node and the first capacitor, wherein
• the input node of each low-noise amplifier is connectable to at least two input terminals via the input switch circuit group,
• the output node of each low-noise amplifier is connectable to at least two output terminal via the through-switch circuit group, and
• a bypass path is provided from the input switch circuit group to the through-switch circuit group, the bypass path not pass through any low-noise amplifier.

A low-noise amplifier device on a silicon-on-insulator substrate, comprising:

• an input node to receive a first signal;
• an output node to output a second signal corresponding to the first signal;
• a first transistor having a gate that receives the first signal from the input node and thereby outputs an amplified first signal;
• a second transistor connected between a drain of the first transistor and the output node;
• a first inductor connected between a source of the first transistor and a ground potential node;
• a first capacitor connected between the gate of the first transistor and the input node;
• a plurality of first diodes connected in series between a first node and a second node in a forward direction from the first node to the second node, the first node being between the first inductor and the first transistor, the second node being between the input node and the first capacitor;
• and
• a plurality of second diodes connected in series between the first node and the second node in a reverse direction from the first node to the second node, wherein
• the plurality of first diodes is connected in parallel with the plurality of second diodes between the first and second nodes.