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US 10,256,402 B1Granted
ReRAM read state verification based on cell turn-on characteristics
AssigneeSanDisk Technologies LLC
InventorsBijesh Rajamohanan, Juan Saenz
Life of this patent
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Abstract
A method of operating a resistive memory device includes providing a resistive memory device including an array of resistive memory cells, where each of the resistive memory cells includes a resistive memory material having at least two different resistive states, performing a first mode read operation on a group of resistive memory cells within the array, determining a bit error rate for data generated by the first mode read operation, determining whether the determined bit error rate is below a predetermined limit, and performing a second mode read operation on the group of resistive memory cells within the array based on a threshold voltage if the determined bit error rate is above the predetermined limit.
Claims18
A method of operating a resistive memory device, comprising:
- providing a resistive memory device including an array of resistive memory cells, wherein each of the resistive memory cells comprises a resistive memory material having at least two different resistive states;
- performing a first mode read operation on a group of resistive memory cells within the array;
- determining a bit error rate for data generated by the first mode read operation;
- determining whether the determined bit error rate is below a predetermined limit;
- and
- performing a second mode read operation on the group of resistive memory cells within the array based on a threshold voltage if the determined bit error rate is above the predetermined limit;
- wherein:
- the first mode read operation uses a predetermined state differentiation threshold current as a criterion for determining a resistive state of a selected resistive memory cell within the group of resistive memory cells;
- the second mode read operation measures the threshold voltage that generates a threshold current as a criterion for determining the resistive state of the selected resistive memory cell within the group of resistive memory cells;
- the threshold voltage of the second mode read operation is determined by measuring a voltage across the selected resistive memory cell that provides a preset level of electrical current through the selected resistive memory cell;
- and
- the preset level of electrical current is less than 0.01 times the predetermined state differentiation threshold current.
9 more elements
A resistive memory device, comprising:
- an array of resistive memory cells, wherein each of the resistive memory cells comprises a resistive memory material having at least two different resistive states;
- a sense amplifier circuitry configured to sense electrical current through each of the resistive memory cells under a given electrical bias condition;
- and
- a read program controller configured to perform a first mode read operation employing a predetermined state differentiation threshold current as a criterion for determining a resistive state of a selected resistive memory cell, and a second mode read operation that measures a threshold voltage that generates a predetermined threshold current as a criterion for determining the resistive state of the selected resistive memory cell,
- wherein the read program controller is configured to:
- perform the first mode read operation on a group of resistive memory cells within the array;
- determine a bit error rate for data generated by the first mode read operation;
- determine whether the determined bit error rate is below a predetermined limit;
- and
- perform the second mode read operation on the group of resistive memory cells within the array if the determined bit error rate is above the predetermined limit;
- wherein the threshold voltage of the second mode read operation is measured by determining a voltage across a selected resistive memory cell that provides a preset level of electrical current through the selected resistive memory cell;
- and
- wherein the preset level of electrical current is less than 0.01 times a state differentiation threshold current.
10 more elements
A method of operating a resistive memory device, comprising:
- providing a resistive memory device including an array of resistive memory cells, wherein each of the resistive memory cells comprises a resistive memory material having at least two different resistive states;
- performing a first mode read operation on a group of resistive memory cells within the array;
- determining a bit error rate for data generated by the first mode read operation;
- determining whether the determined bit error rate is below a predetermined limit;
- and
- performing a second mode read operation on the group of resistive memory cells within the array based on a threshold voltage if the determined bit error rate is above the predetermined limit;
- wherein:
- the first mode read operation uses a predetermined state differentiation threshold current as a criterion for determining a resistive state of a selected resistive memory cell within the group of resistive memory cells;
- the second mode read operation measures the threshold voltage that generates a threshold current as a criterion for determining the resistive state of the selected resistive memory cell within the group of resistive memory cells;
- the selected resistive memory cell comprises a barrier modulated cell of a resistive random access memory (ReRAM) device;
- the barrier modulated cell comprises a metal oxide material having at least two states having different resistivity, a barrier material and an interfacial barrier oxide located between the metal oxide material and the barrier material;
- and
- the metal oxide material comprises sub-stoichiometric titanium oxide (TiO2-δ), the barrier material comprises amorphous silicon, and the interfacial barrier oxide comprises silicon oxide.
10 more elements
Dependencies are inferred from the claim text.