Magnetic random access memory structures, integrated circuits, and methods for fabricating the same
AssigneeGlobalfoundries Singapore Pte. Ltd.
InventorTaiebeh Tahmasebi
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Abstract
Spin transfer torque magnetic random access memory structures, integrated circuits, and methods for fabricating integrated circuits and/or memory cells are provided. An exemplary method for fabricating integrated circuit includes forming a bottom electrode and forming a fixed layer disposed over the bottom electrode. The fixed layer includes a hard layer disposed over a base layer. The base layer includes a seed layer of nickel (Ni) and chromium (Cr) and has a thickness of less than about 100 Angstrom (A). The method further includes forming at least a first tunnel barrier layer over the hard layer, forming a storage layer over the first tunnel barrier layer, and forming a top electrode over the storage layer.
Claims20
A method for fabricating an integrated circuit, the method comprising:
- forming a bottom electrode;
- forming a fixed layer over the bottom electrode, wherein the fixed layer comprises a hard layer disposed directly on a base layer, wherein the base layer comprises a seed layer, wherein the seed layer has a thickness of less than about 100 A, wherein the seed layer comprises nickel (Ni) and chromium (Cr), wherein the hard layer comprises an antiparallel layer, and wherein the antiparallel is disposed directly on the seed layer;
- forming at least a first tunnel barrier layer over the hard layer;
- forming a storage layer over the first tunnel barrier layer;
- and
- forming a top electrode over the storage layer.
A method for forming a memory cell comprising:
- forming a transistor with a gate between first and second source/drain regions;
- forming a bottom electrode coupled to a selected source/drain region;
- forming a seed layer over the bottom electrode, wherein the seed layer has a thickness of less than about 100 A, and wherein the seed layer comprises nickel/chromium (Ni/Cr)n bilayers, wherein n is the number of bilayers from 1 to 20, and/or a non-magnetic alloy of (NixCr), wherein 0<x≤0.80;
- forming a hard layer directly on the seed layer;
- forming a first tunnel barrier layer over the hard layer;
- forming a storage layer over the first tunnel barrier layer;
- forming a top electrode over the storage layer;
- and
- forming a bitline coupled to the top electrode layer.
Dependencies are inferred from the claim text.