Thin film solar cell module including series connected cells formed on a flexible substrate by using lithography

A solar cell module comprising:

• a first metallization layer;
• a semiconductor layer, wherein the semiconductor layer has a top surface and an opposite bottom surface facing the first metallization layer;
• a plurality of first isolation trenches aligned in the first metallization layer and the semiconductor layer;
• a plurality of contact trenches aligned in the first metallization layer and the semiconductor layer, wherein the plurality of contact trenches laterally divide the semiconductor layer into a plurality of semiconductor regions, wherein a width of each contact trench is greater than a width of each first isolation trench;
• a dielectric layer disposed within the first isolation trenches;
• a transparent metallization layer disposed on the plurality of semiconductor regions, within the plurality of contact trenches, and within the plurality of first isolation trenches, wherein the transparent metallization layer has an exposed surface opposite the first metallization layer and configured to be a light incident surface of the solar cell module, and wherein the transparent metallization layer disposed within the plurality of contact trenches comprises a concave shape having a cavity on the exposed surface below the top surface of the semiconductor layer;
• and
• a plurality of second isolation trenches in the transparent metallization layer, wherein the plurality of second isolation trenches separate adjacent cells of a plurality of series-connected solar cells.

A solar cell module comprising:

• a flexible substrate;
• a first non-transparent conductive layer having a plurality of first isolation trenches and a plurality of first contact trenches, wherein a width of one of the plurality of first contact trenches is greater than a width of a corresponding one of the plurality of first isolation trenches;
• a semiconductor layer having a plurality of second isolation trenches and a plurality of second contact trenches, wherein the plurality of second isolation trenches are aligned with the plurality of first isolation trenches, and wherein the plurality of second contact trenches are aligned with the plurality of first contact trenches to laterally divide the semiconductor layer into a plurality of semiconductor regions;
• and
• a dielectric layer disposed within the plurality of first isolation trenches and within the plurality of second isolation trenches.