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US 10,256,313 B2Granted
Semiconductor device with surface insulating film
AssigneeRohm Co., Ltd.
InventorsYuki Nakano, Ryota Nakamura
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Abstract
A semiconductor device of the present invention includes a semiconductor layer of a first conductivity type having a cell portion and an outer peripheral portion disposed around the cell portion, and a surface insulating film disposed in a manner extending across the cell portion and the outer peripheral portion, and in the cell portion, formed to be thinner than a part in the outer peripheral portion.
Claims26
A semiconductor device, comprising:
- a semiconductor substrate;
- a cell portion arranged at a center portion of the semiconductor substrate in a plan view;
- an outer peripheral portion surrounding the cell portion in a plan view;
- a plurality of gate trenches formed at the surface of the silicon substrate at the cell portion;
- a plurality of gate electrodes formed so as to be buried in the plurality of gate trenches;
- a surface insulating film with a first thickness formed so as to cover the plurality of gate electrodes at the cell portion, and with a second thickness formed so as to cover the semiconductor substrate at the outer peripheral portion;
- a first source pad portion formed on/over the semiconductor substrate at the cell portion;
- a gate portion formed on/over the semiconductor substrate at the outer peripheral portion;
- a second source pad portion formed on/over the semiconductor substrate so as to surround the gate portion at the outer peripheral portion;
- and
- a slit region formed in a uniform width along the gate portion in a plan view, wherein
- the first thickness is thinner than the second thickness.
9 more elements
A wide-bandgap semiconductor device, comprising:
- a semiconductor substrate made of a wide-bandgap semiconductor;
- a cell portion arranged at a center portion of the semiconductor substrate in a plan view;
- an outer peripheral portion surrounding the cell portion in a plan view;
- a plurality of gate trenches formed at the surface of the silicon substrate at the cell portion;
- a plurality of gate electrodes formed so as to be buried in the plurality of gate trenches;
- a surface insulating film with a first thickness formed so as to cover the plurality of gate electrodes at the cell portion, and with a second thickness formed so as to cover the semiconductor substrate at the outer peripheral portion;
- a first source pad portion formed on/over the semiconductor substrate at the cell portion;
- a gate portion formed on/over the semiconductor substrate at the outer peripheral portion;
- a second source pad portion formed on/over the semiconductor substrate so as to surround the gate portion at the outer peripheral portion;
- and
- a slit region formed in a uniform width along the gate portion in a plan view, wherein the first thickness is thinner than the second thickness.
8 more elements
Dependencies are inferred from the claim text.