Chip-scale image sensor package and associated method of making

An encapsulated image-sensor wafer comprising:

• a device wafer having (i) a plurality of pixel arrays on a first surface of the device wafer, and (ii) a peripheral region surrounding the plurality of pixel arrays;
• a transparent wafer covering each of the plurality of pixel arrays, having a bottom wafer surface proximate each of the plurality of pixel arrays, and a top wafer surface opposite the bottom substrate surface;
• a plurality of thin films on the top wafer surface, any two adjacent thin films of the plurality of thin films being separated by an inter-film region of the top wafer surface therebetween, each of the plurality of pixel arrays being entirely beneath a respective one of the plurality of thin films;
• and
• a plurality of conductive pads within the peripheral region, each electrically connected to one of the plurality of pixel arrays, a portion of each of the plurality of conductive pads being directly beneath an inter-film region.

A method for forming a chip-scale image sensor package, comprising:

• aligning each of a plurality of thin films, located on a top surface of a transparent wafer, to a respective one of a plurality of image sensors formed on a device wafer, a minimum distance between any two of the plurality of thin films exceeding a first distance in a first direction parallel to the top surface;
• attaching the transparent wafer to the device wafer while maintaining alignment of each of the plurality of thin films to the respective one of the plurality of image sensors to form a protected image sensor wafer;
• and
• dicing the protected image sensor wafer along a plane between adjacent ones of the plurality of thin films by forming a kerf between the adjacent thin films that is less than the first distance.