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US 10,256,181 B2Granted
Package substrates
AssigneeSamsung Electronics Co., Ltd.
InventorsJinGyu Kim, Taehun Kim, JiSun Hong, Byungmoon Bae, Se-Ho You
Life of this patent
Estimating the term…
Abstract
A package substrate includes a substrate including a circuit region, a dummy region surrounding the circuit region, and a lower circuit pattern at the dummy region, the circuit region including unit regions arranged in a matrix shape, and solders on the lower circuit pattern, at least one of the solders electrically connected to the lower circuit pattern.
Claims20
A package substrate, comprising:
- a substrate including a circuit region, an electrostatic discharge region surrounding the circuit region, and a lower circuit pattern in the electrostatic discharge region on a bottom surface of the substrate;
- a semiconductor chip mounted on a top surface of the substrate;
- a mold structure on the bottom surface of the substrate, the mold structure being grounded;
- and
- solders on the lower circuit pattern, the solders at least partially surrounding the circuit region, at least some of the solders configured to be grounded when connected to a ground terminal of the mold structure in a mold process.
2 more elements
A package substrate, comprising:
- a substrate including a circuit region, and a electrostatic discharge region surrounding the circuit region, the circuit region including unit regions arranged in a matrix shape, each of the electrostatic discharge region and circuit region including a lower circuit pattern and an upper circuit pattern;
- a semiconductor chip mounted on a top surface of the substrate;
- a mold structure on a bottom surface of the substrate, the mold structure being grounded;
- and
- solders on the lower circuit pattern of the electrostatic discharge region, at least one of the solders electrically connected to the mold structure,
- wherein the solders are spaced apart from the lower circuit pattern of the circuit region.
3 more elements
A package substrate, comprising:
- a substrate including a circuit region, a electrostatic discharge region surrounding the circuit region, and a lower circuit pattern in the electrostatic discharge region on a bottom surface of the substrate;
- a semiconductor chip mounted on a top surface of the substrate;
- a mold structure on the bottom surface of the substrate, the mold structure being grounded;
- and
- solders on the lower circuit pattern, the solders at least partially surrounding the circuit region, at least one of the solders electrically connected to the mold structure.
2 more elements
Dependencies are inferred from the claim text.