Self-aligned trench isolation in integrated circuits
AssigneeCypress Semiconductor Corporation
InventorsChing-Huang Lu, Lei Xue, Kenichi Ohtsuka, Simon Siu-Sing Chan, Rinji Sugino
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Abstract
An A method for fabricating an integrated circuit (IC) comprising a substrate, a first device, a second device, and a trench in the substrate is described herein. The trench is self-aligned between the first and second devices and comprises a first portion filled with a dielectric material and a second portion filled with a conductive material. The self-aligned placement of the trench provides electrical isolation between the first and second devices and allows for higher packing density without negatively affecting the operation of closely spaced devices in a high density IC.
Claims3
A method, comprising:
- forming first and second partial gate structures adjacent one another over a substrate, wherein a defined area in the substrate is located between the first and second partial gate structures;
- wherein the first and second partial gate structures have a partial gate layer that has a smaller vertical dimension than a complete gate layer;
- forming a self-aligned trench in the defined area between the first and second partial gate structures;
- filling a first portion of the self-aligned trench with a dielectric material;
- filling a second portion of the self-aligned trench with a conductive material;
- and
- after filling the first and second portions of the self-aligned trench, forming an additional gate layer over the partial gate layer of the first and second partial gate structures to form gate structures with the complete gate layer.
Dependencies are inferred from the claim text.