Method of manufacturing semiconductor device
AssigneeRenesas Electronics Corporation
InventorTatsuya Usami
Life of this patent
Estimating the term…
Abstract
To improve the characteristics of a semiconductor device having a substrate contact formed in a deep trench. In a method of forming a plug PSUB in a deep trench DT2 that penetrates an n-type buried layer NBL and reaches a p-type epitaxial layer PEP1, the plug PSUB is formed in the deep trench DT2 after a metal silicide layer SIL1 is formed in the p-type epitaxial layer PEP1. The metal silicide layer SIL1 is formed using a PVD-first metal film (a first metal film formed by PVD). A first barrier metal film BM1 at the bottom of the plug PSUB is a CVD-second metal film (a second metal film formed by CVD). The first metal film is a metal film different from the second metal film.
Claims17
A method of manufacturing a semiconductor device, comprising the steps of:
- (a) preparing a semiconductor substrate having a first p-type silicon layer, an n-type silicon layer over the first p-type silicon layer, and a second p-type silicon layer over the n-type silicon layer;
- (b) forming a MOS transistor over the second p-type silicon layer in a first region of a major surface of the semiconductor substrate, the MOS transistor having a gate electrode, a source region, and a drain region;
- (c) forming a trench that penetrates, in a second region different from the first region, the second p-type silicon layer and the n-type silicon layer and reaches the first p-type silicon layer;
- (d) forming a silicide layer over the first p-type silicon layer exposed at a bottom of the trench, the silicide layer including a first metal film;
- and
- (e) forming a plug electrode in the trench,
- wherein the step (d) includes steps of:
- (d-1) forming the first metal film over the first p-type silicon layer by PVD;
- (d-2) heat-treating the semiconductor substrate so as to form the silicide layer including the first metal film, and
- (d-3) removing the first metal film that has not reacted to form the silicide layer.
A method of manufacturing a semiconductor device, comprising the steps of:
- (a) preparing a semiconductor substrate having a first p-type silicon layer, an n-type silicon layer over the first p-type silicon layer, and a second p-type silicon layer over the n-type silicon layer;
- (b) forming a MOS transistor over the second p-type silicon layer in a first region of a major surface of the semiconductor substrate, the MOS transistor having a gate electrode, a source region, and a drain region;
- (c) forming a first trench surrounding the MOS transistor in the first region in plan view and a second trench in a second region different from the first region such that the first and second trenches penetrate the second p-type silicon layer and the n-type silicon layer from the major surface of the semiconductor substrate and reach the first p-type silicon layer;
- (d) forming a first insulating film over side walls of the second trench so as to expose the first p-type silicon layer at a bottom of the second trench;
- (e) forming a silicide layer over the first p-type silicon layer exposed at the bottom of the second trench, the silicide layer including a first metal film;
- (f) forming a second insulating film over the semiconductor substrate so as to fill the first trench and the second trench;
- (g) forming a first opening at the second insulating film so as to expose a major surface of the silicide layer in the second trench;
- and
- (h) forming a first plug electrode in the first opening.
A method of manufacturing a semiconductor device, comprising the steps of:
- (a) preparing a semiconductor substrate having a first p-type silicon layer, an n-type silicon layer over the first p-type silicon layer, and a second p-type silicon layer over the n-type silicon layer;
- (b) forming a MOS transistor over the second p-type silicon layer in a first region of a major surface of the semiconductor substrate, the MOS transistor having a gate electrode, a source region, and a drain region;
- (c) forming a first trench surrounding the MOS transistor in the first region in plan view and a second trench in a second region different from the first region such that the first and second trenches penetrate the second p-type silicon layer and the n-type silicon layer from the major surface of the semiconductor substrate and reach the first p-type silicon layer;
- (d) forming an insulating film over the semiconductor substrate so as to fill the first trench and the second trench, the insulating film having a gap in each of the first trench and the second trench;
- (e) forming an opening at the insulating film so as to expose the first p-type silicon layer in the second trench;
- (f) forming a silicide layer over the first p-type silicon layer exposed from the opening, the silicide layer including a metal film;
- and
- (g) forming a plug electrode in the opening.
Dependencies are inferred from the claim text.