Semiconductor memory devices, memory systems including the same and methods of operating the same

A method of operating a semiconductor memory device including a memory cell array, the method comprising:

• counting, by a first controller of the memory device, a number of accesses to a first memory region of the memory cell array to determine whether a disturbance on at least one neighbor memory region reaches a reference value, the at least one neighbor memory region being located adjacent to the first memory region;
• and
• performing, by a second controller of the memory device, a scrubbing operation on some sub-pages of the at least one neighbor memory region when the counted number of accesses reaches the reference value to correct at least one error in at least one of the sub-pages caused by a capacitive coupling between the first memory region and the at least one neighbor memory region.

A semiconductor memory device comprising:

• a memory cell array;
• a main controller configured to receive an access command through a first pin of the memory device and a memory address through a second pin of the memory device to access a first memory region of the memory cell array, output a signal to a memory controller through a third pin of the memory device when accesses to the first memory region have exceeded a reference value during a given time interval, and perform a scrubbing operation on a second memory region adjacent to the first memory region in response to a scrubbing command received from the memory controller through the first pin and sent by the memory controller in response to the signal, to correct at least one error in the second memory region caused by a capacitive coupling between the first memory region and the second memory region.