Semiconductor memory device

A semiconductor memory device comprising:

• a memory cell array including a plurality of memory strings, each of the memory strings including a plurality of memory cells connected in series;
• a plurality of word lines commonly connected to the memory strings and connected to the memory cells;
• and
• a control circuit which executes a write operation including a plurality of program loops, each of the program loops including a program operation in which a program voltage is applied to a selected word line and a verify operation in which a threshold voltage of a memory cell is verified,
• wherein
• when a suspend command for instructing an operation suspend is externally received during execution of the program operation, the control circuit applies a first voltage higher than a ground voltage to the word lines after the program operation and during a suspend period.

A semiconductor memory device comprising:

• a memory cell array including a plurality of memory strings, each of the memory strings including a plurality of memory cells connected in series;
• a plurality of word lines commonly connected to the memory strings and connected to the memory cells;
• and
• a control circuit which executes a write operation including a plurality of program loops, each of the program loops including a program operation in which a program voltage is applied to a selected word line and a verify operation in which a threshold voltage of a memory cell is verified,
• wherein the control circuit
• steps up the program voltage each time the program loop is executed,
• enters into a suspend mode when a suspend command for instructing an operation suspend is externally received during the write operation, and
• controls the program voltage such that the program voltage immediately after the suspend operation is lower than the program voltage applied immediately before the suspend mode.