Memory device
AssigneeWinbond Electronics Corp.
InventorYuji Nakaoka
Life of this patent
Estimating the term…
Abstract
A memory device is provided. The memory device includes a first chip and a second chip. The first chip includes a first memory array, a first signal buffer and a plurality of first pads. The second chip includes a second memory array, a second signal buffer and a plurality of second pads. The second signal buffer is coupled to the first signal buffer by at least one connection wire, and the at least one connection wire passes through a scribe line between the first chip and the second chip. When the scribe line between the first chip and the second chip is not cut, signals are transmitted between the first signal buffer and the second signal buffer via the at least one connection wire, and the first memory array and the second memory array are commonly connected to the first pads and not connected to the second pads.
Claims12
A memory device, comprising:
- a first chip, comprising a first memory array, a first signal buffer and a plurality of first pads;
- and
- a second chip, comprising a second memory array, a second signal buffer and a plurality of second pads, the second signal buffer being coupled to the first signal buffer in the first chip by at least one connection wire, the at least one connection wire passing through a scribe line between the first chip and the second chip,
- wherein when the scribe line between the first chip and the second chip is not cut, signals are transmitted between the first signal buffer and the second signal buffer via the at least one connection wire, and the first memory array and the second memory array are commonly connected to the first pads and not connected to the second pads.
Dependencies are inferred from the claim text.