Display driving circuit, its control method and display device

A method for controlling a display driving circuit, wherein the display driving circuit comprises a characteristic collector, a comparator, a timing controller and a gate driver;

• wherein the gate driver comprises at least two cascade shift register units, each of the at least two cascade shift register units comprising a first pull-down circuit connected to a first pull-down node and a second pull-down circuit connected to a second pull-down node;
• and the gate driver is provided with a first pull-up voltage terminal for charging the first pull-down node and a second pull-up voltage terminal for charging the second pull-down node;
• wherein the characteristic collector is connected to a pull-down voltage terminal and a first input terminal of the comparator, and also to the first pull-up voltage terminal or the second pull-up voltage terminal;
• the characteristic collector is configured for collecting a voltage of the first pull-up voltage terminal or the second pull-up voltage terminal, and for outputting, to the first input terminal of the comparator, a characteristic voltage which conforms to characteristics of the voltage of the first pull-down circuit or the second pull-down circuit;
• wherein a second input terminal of the comparator is connected to a reference voltage terminal, and an output terminal of the comparator is connected to the timing controller;
• and the comparator is configured for comparing the characteristic voltage with a reference voltage of the reference voltage terminal;
• and
• wherein the timing controller is further connected to the gate driver;
• and the timing controller is configured for receiving a comparison result from the comparator, and when the comparison result indicates that the characteristic voltage is greater than or equal to the reference voltage, the timing controller generates a timing control signal such that the first pull-up voltage terminal and the second pull-up voltage terminal are caused to output a DC voltage under the control of the timing control signal, thereby causing the first pull-down node and the second pull-down node to be simultaneously charged, and both the first pull-down circuit and the second pull-down circuit to be in a working state,
• the method comprising:
• collecting a voltage of the first pull-up voltage terminal or the second pull-up voltage terminal and outputting a characteristic voltage that conforms to characteristics of the voltage of the first pull-down circuit or the second pull-down circuit;
• comparing the characteristic voltage with a reference voltage of the reference voltage terminal;
• generating a timing control signal when the characteristic voltage is greater than or equal to the reference voltage;
• and
• causing the first pull-up voltage terminal or the second pull-up voltage terminal to output a DC voltage under the control of the timing control signal, thereby causing the first pull-down node and the second pull-down node to be simultaneously charged, and both the first pull-down circuit and the second pull-down circuit to be in a working state.

A display device, comprising a display driving circuit that comprises a characteristic collector, a comparator, a timing controller and a gate driver;

• wherein the gate driver comprises at least two cascade shift register units, each of the at least two cascade shift register units comprising a first pull-down circuit connected to a first pull-down node and a second pull-down circuit connected to a second pull-down node;
• and the gate driver is provided with a first pull-up voltage terminal for charging the first pull-down node and a second pull-up voltage terminal for charging the second pull-down node;
• wherein the characteristic collector is connected to a pull-down voltage terminal and a first input terminal of the comparator, and also to the first pull-up voltage terminal or the second pull-up voltage terminal;
• the characteristic collector is configured for collecting a voltage of the first pull-up voltage terminal or the second pull-up voltage terminal, and for outputting, to the first input terminal of the comparator, a characteristic voltage which conforms to characteristics of the voltage of the first pull-down circuit or the second pull-down circuit;
• wherein a second input terminal of the comparator is connected to a reference voltage terminal, and an output terminal of the comparator is connected to the timing controller;
• and the comparator is configured for comparing the characteristic voltage with a reference voltage of the reference voltage terminal;
• and
• wherein the timing controller is further connected to the gate driver;
• and the timing controller is configured for receiving a comparison result from the comparator, and when the comparison result indicates that the characteristic voltage is greater than or equal to the reference voltage, the timing controller generates a timing control signal such that the first pull-up voltage terminal and the second pull-up voltage terminal are caused to output a DC voltage under the control of the timing control signal, thereby causing the first pull-down node and the second pull-down node to be simultaneously charged, and both the first pull-down circuit and the second pull-down circuit to be in a working state.