Emission driver and display device including the same
AssigneeSamsung Display Co., Ltd.
InventorHwan-Soo Jang
Life of this patent
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Abstract
An emission driver includes a plurality of circuit stages to output emission control signals. Each circuit stage includes signal generators, a pull-up controller to control a pull-up circuit, and a pull-down controller to control a pull-down circuit. One signal generator generates node signals based on a carry signal and a second clock signal. Another signal generator generates a first clock signal delayed from the second clock signal and another node signal. The pull-up circuit pulls up an emission control signal to a first driving voltage based on some of the node signals. The pull-down circuit pulls down the emission control signal to a second driving voltage lower than the first driving voltage. The pull-down controller control the pull-down circuit based on delayed dimming clock signals.
Claims22
An emission driver, comprising:
- a plurality of circuit stages to output a plurality of emission control signals, each of the circuit stages including:
- a first signal generator to generate a first node signal of a first node and a second node signal of a second node based on a carry signal and a second clock signal;
- a second signal generator to generate a third node signal of a third node based on a first clock signal and the first and second node signals, the first clock signal delayed from the second clock signal and having a phase same as the second clock signal;
- a pull-up circuit to pull up an emission control signal to a first driving voltage based on the third node signal;
- a pull-up controller to control the third node signal based on a fourth node signal of a fourth node;
- a pull-down circuit to pull down the emission control signal to a second driving voltage lower than the first driving voltage based on the fourth node signal;
- and
- a first pull-down controller to control the fourth node signal based on a first dimming clock signal and a second dimming clock signal delayed from the first dimming clock signal, wherein
- the first and second dimming clock signals have a phase different from the first and second clock signals.
A display apparatus, comprising:
- a display panel including a pixel which includes an organic light emitting diode and an emission control transistor to drive the organic light emitting diode;
- a timing controller to generate a first clock signal, a second clock signal delayed from the first clock signal, a first dimming clock signal, and a second dimming clock signal delayed from the first dimming clock signal;
- an emission driver to output an emission control signal to the emission control transistor, control a rising period of the emission control signal based on the first and second clock signals, and control a falling period of the emission control signal based on the first and second dimming clock signals, wherein the emission driver includes a plurality of circuit stages and where each of the circuit stages includes:
- a first signal generator to generate a first node signal of a first node and a second node signal of a second node based on a carry signal and a second clock signal;
- a second signal generator to generate a third node signal of a third node based on the first clock signal and the first and second node signals, the first clock signal delayed from the second clock signal and having a phase same as the second clock signal;
- a pull-up circuit to pull up an emission control signal to a first driving voltage based on the third node signal;
- a pull-up controller to control the third node signal of the third node based on a fourth node signal of a fourth node;
- a pull-down circuit to pull down the emission control signal to a second driving voltage lower than the first driving voltage based on the fourth node signal;
- and
- a first pull-down controller to control the fourth node signal based on the first dimming clock signal and a second dimming clock signal delayed from the first dimming clock signal, the first and second dimming clock signals having a phase different from the first and the second clock signals.
Dependencies are inferred from the claim text.