Indirectly accessing sample data to perform multi-convolution operations in a parallel processing system
AssigneeNVIDIA Corporation
InventorsJohn Clifton Woolley, Jr., John Tran
Life of this patent
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AssigneeNVIDIA Corporation
InventorsJohn Clifton Woolley, Jr., John Tran
Estimating the term…
In one embodiment of the present invention, a convolution engine configures a parallel processing pipeline to perform multi-convolution operations. More specifically, the convolution engine configures the parallel processing pipeline to independently generate and process individual image tiles. In operation, for each image tile, the pipeline calculates source locations included in an input image batch based on one or more start addresses and one or more offsets. Subsequently, the pipeline copies data from the source locations to the image tile. The pipeline then performs matrix multiplication operations between the image tile and a filter tile to generate a contribution of the image tile to an output matrix. To optimize the amount of memory used, the pipeline creates each image tile in shared memory as needed. Further, to optimize the throughput of the matrix multiplication operations, the values of the offsets are precomputed by a convolution preprocessor.
A computer-implemented method for performing a multi-convolution operation, the method comprising:
A non-transitory, computer-readable storage medium including instructions that, when executed by a processor, cause the processor to perform a multi-convolution operation, by performing the steps of:
A system configured to perform a multi-convolution operation, the system comprising:
Dependencies are inferred from the claim text.