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US 10,255,193 B2Granted
Virtual address table
AssigneeMicron Technology, Inc.
InventorsJohn D. Leidel, Kyle B. Wheeler
Life of this patent
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Abstract
The present disclosure includes apparatuses and methods related to virtual address tables. An example method comprises generating an object file that comprises: an instruction comprising a number of arguments; and an address table comprising a number of indexed address elements. Each one of the number of indexed address elements can correspond to a virtual address of a respective one of the number of arguments, wherein the address table can serves as a target for the number of arguments. The method can include storing the object file in a memory.
Claims11
A method, comprising:
- generating an object file comprising:
- multiple instructions each comprising a number of arguments;
- and
- respective address tables corresponding to the multiple instructions and each comprising a number of indexed address elements each corresponding to a virtual address of a respective one of the number of arguments;
- populating the address elements of the address tables with virtual addresses corresponding to the number of arguments;
- and
- translating the virtual addresses corresponding to the number of arguments to physical locations in a memory array of a memory device prior to providing an instruction dispatch block to the memory device.
4 more elements
A system, comprising:
- a host;
- a memory device coupled to the host, wherein the host is configured to:
- initiate execution of an object file comprising:
- multiple instructions each comprising a number of arguments;
- and
- respective address tables corresponding to the multiple instructions and each comprising a number of indexed address elements each corresponding to a virtual address of a respective one of the number of arguments;
- populate the address elements of the address tables with virtual addresses corresponding to the number of arguments;
- and
- translate the virtual addresses corresponding to the number of arguments to physical locations in a memory array of the memory device prior to providing an instruction dispatch block to the memory device.
6 more elements
Dependencies are inferred from the claim text.