Function callback mechanism between a Central Processing Unit (CPU) and an auxiliary processor
AssigneeIntel Corporation
InventorsBrian T. Lewis, Rajkishore Barik, Tatiana Shpeisman
Life of this patent
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AssigneeIntel Corporation
InventorsBrian T. Lewis, Rajkishore Barik, Tatiana Shpeisman
Estimating the term…
Generally, this disclosure provides systems, devices, methods and computer readable media for implementing function callback requests between a first processor (e.g., a GPU) and a second processor (e.g., a CPU). The system may include a shared virtual memory (SVM) coupled to the first and second processors, the SVM configured to store at least one double-ended queue (Deque). An execution unit (EU) of the first processor may be associated with a first of the Deques and configured to push the callback requests to that first Deque. A request handler thread executing on the second processor may be configured to: pop one of the callback requests from the first Deque; execute a function specified by the popped callback request; and generate a completion signal to the EU in response to completion of the function.
A system for implementing a function between a first processor and a second processor, said system comprising:
A method for function operation between a first processor and a second processor, said method comprising:
At least one computer-readable storage medium having instructions stored thereon which when executed by a processor result in the following operations for a function between a first processor and a second processor, said operations comprising:
Dependencies are inferred from the claim text.