Memory device write based on mapping
AssigneeHewlett Packard Enterprise Development LP
InventorsRajeev Balasubramonian, Gregg B. Lesartre, Robert Schreiber, Jishen Zhao, Naveen Muralimanohar, Paolo Faraboschi
Life of this patent
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Abstract
Techniques for memory device writes based on mapping are provided. In one aspect, a block of data to be written to a line in a rank of memory may be received. The rank of memory may comprise multiple memory devices. The block of data may be written to a number of memory devices determined by the size of the block of data. A memory device mapping for the line may be retrieved. The mapping may determine the order in which the block of data is written to the memory devices within the rank. The block of data may be written to the memory devices based on the mapping.
Claims13
A method comprising:
- receiving a block of data to be written to a line in a rank of memory, wherein the rank of memory comprises multiple memory devices and the block of data is written to a number of memory devices determined by the size of the block of data;
- retrieving a memory device mapping for the line, wherein the mapping determines the order in which the block of data is written to the memory devices within the rank;
- writing the block of data to the memory devices based on the mapping, wherein writing the block of data to the memory devices further comprises adding the block of data to a write queue and setting a bit vector to indicate memory devices that will be used to write the block of data;
- examining a bit vector to determine if the block of data can be written to the memory devices;
- updating a busy vector based on the bit vector when the write can proceed;
- and
- writing the block of data when the write can proceed.
A device comprising:
- a data block mapping circuit to map a compressed block of data to memory devices in a rank of memory;
- and
- a write circuit to write the block of data to the memory devices in the order determined by the mapping circuit, wherein writing the block of data to the memory devices further comprises adding the block of data to a write queue and setting a bit vector to indicate memory devices that will be used to write the block of data;
- examining a bit vector to determine if the block of data can be written to the memory devices;
- updating a busy vector based on the bit vector when the write can proceed;
- and
- writing the block of data when the write can proceed.
A system comprising:
- A rank of memory, the rank of memory comprising a plurality of memory devices;
- and
- a memory controller, the memory controller to write a line of data to the memory devices in an order based on a mapping,
- wherein writing the line of data to the memory devices further comprises adding the line of data to a write queue and setting a bit vector to indicate memory devices that will be used to write the line of data;
- examining the bit vector to determine if the line of data can be written to the memory devices;
- updating a busy vector based on the bit vector when the write can proceed;
- and
- writing the line of data when the write can proceed.
Dependencies are inferred from the claim text.