Managing surprise hot plug in low power state
AssigneeIntel Corporation
InventorsK. L. Siva Prasad Gadey NV, Samit Mehrotra, Eric Wehage
Life of this patent
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Abstract
An apparatus is provided which comprises: an input/output (I/O) port; a first circuitry to update an in-band presence detect field, based on communication via an in-band channel; a second circuitry to update an out-of-band presence detect field, based on communication via an out-of-band channel; and a third circuitry to update a presence detect state change field, wherein the third circuitry is to selectively ignore the out-of-band presence detect field and utilize the in-band presence detect field, while the third circuitry is to update the presence detect state change field.
Claims20
An apparatus comprising:
- an input/output (I/O) port;
- a first circuitry to update an in-band presence detect field, based on communication via an in-band channel;
- a second circuitry to update an out-of-band presence detect field, based on communication via an out-of-band channel;
- and
- a third circuitry to update a presence detect state change field,
- wherein the third circuitry is to selectively ignore the out-of-band presence detect field and utilize the in-band presence detect field, while the third circuitry is to update the presence detect state change field.
A system comprising:
- a memory to store instructions;
- a processor coupled to the memory;
- an input/output (I/O) port, wherein the processor is to communicate with one or more devices via the I/O port;
- a first circuitry to assert a first field, based on a surprise hot remove in the I/O port, the first field to indicate a presence detect state change of the I/O port;
- and
- a second circuitry to maintain a detect quiet state of the I/O port, until the first field is de-asserted.
An apparatus comprising:
- an input/output (I/O) port;
- a first circuitry to update a presence detect state change field (PRSDCH) associated with the I/O port;
- and
- a second circuitry to delay transition from a detect quiet state of the I/O port to a detect active state of the I/O port, based on a state of the PRSDCH,
- wherein the second circuitry is to delay transition from the detect quiet state to the detect active state, from a time the PRSDCH is updated until a time the PRSDCH is cleared.
Dependencies are inferred from the claim text.