Using required arrival time constraints for coupled noise analysis and noise aware timing analysis of out-of-context (OOC) hierarchical entities

A non-transitory computer readable medium comprising computer executable instructions which when executed by a computer cause the computer to perform a method of:

• computing, for an out-of-context victim net of an integrated circuit design, coupled noise from at least one out-of-context aggressor net of said integrated circuit design, said out-of-context victim net and said at least one out-of-context aggressor net being out-of-context with respect to a hierarchical noise analysis of said integrated circuit design, at least one of said out-of-context victim net and said at least one out-of-context aggressor net being a continuation of a path which extends to at least one in-context portion of said integrated circuit design;
• deriving, for said at least one out-of-context aggressor net, an aggressor signal timing window;
• deriving, for said out-of-context victim net, a victim signal timing window;
• and
• completing a timing window and noise analysis with said aggressor signal timing window and said victim signal timing window;
• wherein said aggressor signal timing window is derived as a function of required arrival time of said at least one out-of-context aggressor net and/or said victim signal timing window is derived as a function of required arrival time of said out-of-context victim net.

An apparatus comprising:

• a memory;
• and
• at least one processor, coupled to said memory, and operative to:
• compute, for an out-of-context victim net of an integrated circuit design, coupled noise from at least one out-of-context aggressor net of said integrated circuit design, said out-of-context victim net and said at least one out-of-context aggressor net being out-of-context with respect to a hierarchical noise analysis of said integrated circuit design, at least one of said out-of-context victim net and said at least one out-of-context aggressor net being a continuation of a path which extends to at least one in-context portion of said integrated circuit design;
• derive, for said at least one out-of-context aggressor net, an aggressor signal timing window;
• derive, for said out-of-context victim net, a victim signal timing window;
• and
• complete a timing window and noise analysis with said aggressor signal timing window and said victim signal timing window;
• wherein said aggressor signal timing window is derived as a function of required arrival time of said at least one out-of-context aggressor net and/or said victim signal timing window is derived as a function of required arrival time of said out-of-context victim net.