Interconnect structure and semiconductor structures for assembly of cryogenic electronic packages

A cryogenic electronic package, comprising:

• at least two superconducting and/or conventional metal semiconductor structures, each of the semiconductor structures including:
• a substrate having first and second opposing surfaces;
• a superconducting trace having first and second opposing surfaces, wherein the first surface of the superconducting trace is disposed over the second surface of the substrate;
• a passivation layer having first and second opposing surfaces and one or more openings formed in selected portions of the passivation layer, wherein the first surface of the passivation layer is disposed over the second surface of the superconducting trace, and the passivation layer openings extend from the second surface of the passivation layer to the second surface of the superconducting trace over which the first surface of the passivation layer is disposed;
• and
• one or more under bump metal (UBM) structures disposed in respective ones of the passivation layer openings, wherein the UBM structures are electrically coupled to the second surface of the superconducting trace, and have a surface disposed over selected portions of the second surface of the passivation layer surrounding edges of the passivation layer openings;
• and
• one or more superconducting and/or conventional metal interconnect structures disposed between selected ones of the at least two semiconductor structures, and electrically coupled to respective ones of the UBM structures of the semiconductor structures to form one or more electrical connections between the semiconductor structures, wherein a first respective one of the electrical connections formed between a first one of the semiconductor structures and a second one of the semiconductor structures includes:
• the superconducting trace of the first one of the semiconductor structures, a first one of the UBM structures of the first one of the semiconductor structures, a second one of the UBM structures of the second one of the semiconductor structures, the superconducting trace of the second one of the semiconductor structures, and a first respective one of the interconnect structures coupled to the first and second ones of the UBM structures, and wherein a contact area between the interconnect structures and the respective ones of the UBM structures of the semiconductor structures to which the interconnect structures are coupled is provided as having one of:
• a circular shape;
• and
• a rectangular or square shape, wherein in the case of a circular-shape contact area, a diameter of the contact area is greater than a width of the semiconductor trace of the semiconductor structures, and in the case of a rectangular—or square-shaped contact area, a width of the contact area is greater than a width of the semiconductor trace of the semiconductor structures such that in response to a critical current flow at the superconducting trace of the first superconducting structure, a substantially same critical current flows from the first superconducting structure through the interconnect structures such that a substantially same critical current flows through both the superconducting trace of the first semiconductor structure and the superconducting trace of the second semiconductor structure;
• wherein at least one of the one or more interconnect structure has a diameter that is less than a diameter of the UBM structure to which it is coupled.