Multistage collector for outputs in multiprocessor systems
AssigneeImagination Technologies Limited
InventorsJames Alexander McCombe, Steven John Clohset, Jason Rupert Redgrave, Luke Tilman Peterson
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AssigneeImagination Technologies Limited
InventorsJames Alexander McCombe, Steven John Clohset, Jason Rupert Redgrave, Luke Tilman Peterson
Estimating the term…
Aspects include a multistage collector to receive outputs from plural processing elements. Processing elements may comprise (each or collectively) a plurality of clusters, with one or more ALUs that may perform SIMD operations on a data vector and produce outputs according to the instruction stream being used to configure the ALU(s). The multistage collector includes substituent components each with at least one input queue, a memory, a packing unit, and an output queue; these components can be sized to process groups of input elements of a given size, and can have multiple input queues and a single output queue. Some components couple to receive outputs from the ALUs and others receive outputs from other components. Ultimately, the multistage collector can output groupings of input elements. Each grouping of elements (e.g., at input queues, or stored in the memories of component) can be formed based on matching of index elements.
A method of parallelized computation in a distributed multiprocessor system having a plurality of computation units, comprising:
A non-transitory computer readable medium having stored thereon computer executable instructions that when executed cause at least one processor to:
Dependencies are inferred from the claim text.