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US 10,242,148 B2Granted
Integrated circuit and routing design of the same
AssigneeMediatek Inc.
InventorLichiu Weng
Life of this patent
Estimating the term…
Abstract
The invention provides an integrated circuit. The integrated circuit includes a substrate having a first cell region and a second cell region. A first electronic device is disposed on the substrate in the first cell region. A second electronic device is disposed on the substrate in the second cell region. A first bottommost metal pattern overlaps the first cell region and the second cell region. The first bottommost metal pattern is coupled to the first electronic device and the second electronic device.
Claims16
An integrated circuit, comprising:
- a substrate having a first cell region and a second cell region, wherein the first cell region and the second cell region belong to two distinct cells;
- a first electronic device on the substrate in the first cell region;
- a second electronic device on the substrate in the second cell region;
- and
- a first bottommost metal pattern overlapping the first cell region and the second cell region, wherein the first bottommost metal pattern is coupled to the first electronic device and the second electronic device;
- wherein the first electronic device comprises:
- a first fin defined by a plurality of trench isolation features extending along a first direction;
- and
- a first gate structure formed on a top and opposite sidewalls of the first fin;
- wherein the first fin has first source/drain regions and a first channel region overlapped with the first gate structure and between the first source/drain regions;
- wherein the first channel region has a length along the first direction;
- and
- wherein the first electronic device and the second electronic device are disposed on individual dies.
10 more elements
An integrated circuit, comprising:
- a substrate having a first cell region and a second cell region, wherein the first cell region and the second cell region belong to two distinct cells;
- a first fin field-effect transistor extended from the substrate in the first cell region;
- a second fin field-effect transistor extended from the substrate in the second cell region;
- and
- a first bottommost metal pattern overlapping a portion of a first boundary of the first cell region overlapping a second boundary of the second cell region;
- wherein the first fin field-effect transistor comprises:
- a first fin defined by a plurality of trench isolation features extending along a first direction;
- and
- a first gate structure formed on a top and opposite sidewalls of the first fin;
- wherein the first fin has first source/drain regions and a first channel region overlapped with the first gate structure and between the first source/drain regions;
- wherein the first channel region has a first channel length along the first direction;
- and
- wherein the first fin field-effect transistor and the second fin field-effect transistor are disposed on individual dies.
10 more elements
Dependencies are inferred from the claim text.