Predictive 3-D virtual fabrication system and method

A computing device-implemented method of virtually fabricating a semiconductor device structure, comprising:

• receiving a selection of a process sequence in a process editor for a semiconductor device structure to be virtually fabricated;
• adding a user-supplied measurement locator shape to a layer in 2D design data for the semiconductor device structure;
• inserting a user-supplied virtual metrology measurement step into the process sequence prior to the end of the process sequence, the virtual metrology measurement step indicating a point during the process sequence at which a measurement should be taken using the locator shape;
• performing with the computing device a virtual fabrication run that models an integrated process flow used to physically fabricate the semiconductor device structure by using the process sequence and 2D design data to simulate patterning, material addition and material removal steps needed to physically fabricate the semiconductor device structure, the virtual fabrication run:
• executing the process sequence up until the virtual metrology measurement step, the executing building a 3D structural model of the semiconductor device structure, the 3D structural model predictive of a result of a physical fabrication of the semiconductor device structure,
• performing the measurement indicated by the virtual metrology measurement step on the 3D structural model within a region indicated by the locator shape, and
• executing additional steps in the process sequence after the measurement, the virtual fabrication run completing the building of the 3D structural model, the 3D structural model displayed to a user in a 3D view;
• and
• exporting virtual metrology measurement data generated from the virtual metrology measurement step of the virtual fabrication run.

A virtual fabrication system, comprising:

• a computing device equipped with a processor and configured to receive input data with a 3D modeling engine, the input data including 2D design data and a process sequence for a semiconductor device structure to be virtually fabricated, the process sequence including a user-supplied virtual metrology measurement step indicating a point during the process sequence prior to the end of the process sequence at which a measurement should be taken using a locator shape added to the 2D design data, the computing device configured to perform a virtual fabrication run that models an integrated process flow used to physically fabricate the semiconductor device structure by using the process sequence and 2D design data to simulate patterning, material addition and material removal steps needed to physically fabricate the semiconductor device structure, the performing:
• executing the process sequence up until the virtual metrology measurement step, the executing building a 3D structural model of the semiconductor device structure, the 3D structural model predictive of a result of a physical fabrication of the semiconductor device structure,
• performing the measurement indicated by the virtual metrology measurement step on the 3D structural model within a region indicated by the locator shape,
• executing additional steps in the process sequence after the measurement, the virtual fabrication run completing the building of the 3D structural model, the 3D structural model displayed to a user in a 3D view, and
• exporting the virtual metrology measurement data;
• and
• a display surface in communication with the computing device, the display surface configured to display the 3D structural model in a 3D view.