Methods and systems for managing memory blocks of semiconductor devices in embedded systems

A method of mapping target design memory blocks to embedded memory blocks in a semiconductor device of an embedded system, the method comprising:

• categorizing, via an Electronic Design Automation (EDA) tool, a set of target design memory blocks into overlapping memory operation patterns or non-overlapping memory operations patterns, wherein each of the target design memory blocks in the overlapping category have the read and write operations occur at the same time instant or have same read/write control signals and each of the target memory blocks in the non-overlapping category have the read and write operations occur at different time instants or have different read/write control signals;
• and
• implementing, via the EDA tool, the set of target design memory blocks to a single embedded memory block of the semiconductor device based on the categorizing, wherein a number and placement of the semiconductor device components corresponds to one of the overlapping category or the non-overlapping category with which each of the target design memory blocks is associated,
• wherein the implementing comprises:
• placing the set of target design memory blocks and the semiconductor device components on the single embedded memory block.

A system for mapping target design memory blocks to embedded memory blocks in a semiconductor device of an embedded system, the system comprising:

• at least one processor;
• and
• a computer-readable medium storing instructions that, when executed by the at least one processor, cause the at least one processor to perform operations comprising:
• categorizing a plurality target design memory blocks based on memory operation patterns into one of an overlapping category and a non-overlapping category, the overlapping category comprising any of the target design memory blocks having overlapping memory the non-overlapping category comprising any of the other target design memory blocks having non-overlapping memory operation, wherein each of the target design memory blocks in the overlapping category have the read and write operations occur at the same time instant or have same read/write control signals and each of the target memory blocks in the non-overlapping category have the read and write operations occur at different time instants or have different read/write control signals;
• identifying a set of target design memory blocks from the plurality of target design memory blocks that satisfy capacity criteria of a single embedded memory block in the semiconductor device, wherein each target design memory block in the set is identified from the same category selected from one of the overlapping category and the non-overlapping category;
• designing semiconductor device components to be created on the semiconductor device based on one of the overlapping category and the non-overlapping category, which the set of target design memory blocks is associated with;
• and
• implementing the set of target design memory blocks and the semiconductor device components onto the single embedded memory block of the semiconductor device, wherein a number and placement of the semiconductor device components corresponds to one of the overlapping category or the non-overlapping category with which each of the target design memory blocks is associated,
• wherein the implementing comprises:
• placing the set of target design memory blocks and the semiconductor device components on the single embedded memory block.

A non-transitory computer-readable storage medium for mapping target design memory blocks to embedded memory blocks in a semiconductor device of an embedded system, when executed by a computing device, cause the computing device to:

• categorize a plurality target design memory blocks based on memory operation patterns into one of an overlapping category or a non-overlapping category, the overlapping category comprising any of the target design memory blocks having overlapping memory operations or the non-overlapping category comprising any of the other target design memory blocks having non-overlapping memory operation, wherein each of the target design memory blocks in the overlapping category have the read and write operations occur at the same time instant or have same read/write control signals and each of the target memory blocks in the non-overlapping category have the read and write operations occur at different time instants or have different read/write control signals;
• identify a set of target design memory blocks from the plurality of target design memory blocks that satisfy capacity criteria of a single embedded memory block in the semiconductor device, wherein each target design memory block in the set is identified from the same category selected from one of the overlapping category and the non-overlapping category;
• design semiconductor device components to be created on the semiconductor device based on one of the overlapping category and the non-overlapping category, which the set of target design memory blocks is associated with;
• and
• implement the set of target design memory blocks and the semiconductor device components onto the single embedded memory block of the semiconductor device, wherein a number and placement of the semiconductor device components corresponds to one of the overlapping category or the non-overlapping category with which each of the target design memory blocks is associated,
• wherein the implementing comprises:
• placing the set of target design memory blocks and the semiconductor device components on the single embedded memory block.